src/mesa/drivers/dri/i915/i830_state.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28
  29 #include "main/glheader.h"
  30 #include "main/context.h"
  31 #include "main/macros.h"
  32 #include "main/enums.h"
  33 #include "main/dd.h"
  34
  35 #include "texmem.h"
  36
  37 #include "drivers/common/driverfuncs.h"
  38
  39 #include "intel_screen.h"
  40 #include "intel_batchbuffer.h"
  41 #include "intel_fbo.h"
  42 #include "intel_buffers.h"
  43
  44 #include "i830_context.h"
  45 #include "i830_reg.h"
  46
  47 #define FILE_DEBUG_FLAG DEBUG_STATE
  48
  49 static void
  50 i830StencilFuncSeparate(GLcontext * ctx, GLenum face, GLenum func, GLint ref,
  51                         GLuint mask)
  52 {
  53    struct i830_context *i830 = i830_context(ctx);
  54    int test = intel_translate_compare_func(func);
  55
  56    mask = mask & 0xff;
  57
  58    DBG("%s : func: %s, ref : 0x%x, mask: 0x%x\n", __FUNCTION__,
  59        _mesa_lookup_enum_by_nr(func), ref, mask);
  60
  61
  62    I830_STATECHANGE(i830, I830_UPLOAD_CTX);
  63    i830->state.Ctx[I830_CTXREG_STATE4] &= ~MODE4_ENABLE_STENCIL_TEST_MASK;
  64    i830->state.Ctx[I830_CTXREG_STATE4] |= (ENABLE_STENCIL_TEST_MASK |
  65                                            STENCIL_TEST_MASK(mask));
  66    i830->state.Ctx[I830_CTXREG_STENCILTST] &= ~(STENCIL_REF_VALUE_MASK |
  67                                                 ENABLE_STENCIL_TEST_FUNC_MASK);
  68    i830->state.Ctx[I830_CTXREG_STENCILTST] |= (ENABLE_STENCIL_REF_VALUE |
  69                                                ENABLE_STENCIL_TEST_FUNC |
  70                                                STENCIL_REF_VALUE(ref) |
  71                                                STENCIL_TEST_FUNC(test));
  72 }
  73
  74 static void
  75 i830StencilMaskSeparate(GLcontext * ctx, GLenum face, GLuint mask)
  76 {
  77    struct i830_context *i830 = i830_context(ctx);
  78
  79    DBG("%s : mask 0x%x\n", __FUNCTION__, mask);
  80
  81    mask = mask & 0xff;
  82
  83    I830_STATECHANGE(i830, I830_UPLOAD_CTX);
  84    i830->state.Ctx[I830_CTXREG_STATE4] &= ~MODE4_ENABLE_STENCIL_WRITE_MASK;
  85    i830->state.Ctx[I830_CTXREG_STATE4] |= (ENABLE_STENCIL_WRITE_MASK |
  86                                            STENCIL_WRITE_MASK(mask));
  87 }
  88
  89 static void
  90 i830StencilOpSeparate(GLcontext * ctx, GLenum face, GLenum fail, GLenum zfail,
  91                       GLenum zpass)
  92 {
  93    struct i830_context *i830 = i830_context(ctx);
  94    int fop, dfop, dpop;
  95
  96    DBG("%s: fail : %s, zfail: %s, zpass : %s\n", __FUNCTION__,
  97        _mesa_lookup_enum_by_nr(fail),
  98        _mesa_lookup_enum_by_nr(zfail),
  99        _mesa_lookup_enum_by_nr(zpass));
 100
 101    fop = 0;
 102    dfop = 0;
 103    dpop = 0;
 104
 105    switch (fail) {
 106    case GL_KEEP:
 107       fop = STENCILOP_KEEP;
 108       break;
 109    case GL_ZERO:
 110       fop = STENCILOP_ZERO;
 111       break;
 112    case GL_REPLACE:
 113       fop = STENCILOP_REPLACE;
 114       break;
 115    case GL_INCR:
 116       fop = STENCILOP_INCRSAT;
 117       break;
 118    case GL_DECR:
 119       fop = STENCILOP_DECRSAT;
 120       break;
 121    case GL_INCR_WRAP:
 122       fop = STENCILOP_INCR;
 123       break;
 124    case GL_DECR_WRAP:
 125       fop = STENCILOP_DECR;
 126       break;
 127    case GL_INVERT:
 128       fop = STENCILOP_INVERT;
 129       break;
 130    default:
 131       break;
 132    }
 133    switch (zfail) {
 134    case GL_KEEP:
 135       dfop = STENCILOP_KEEP;
 136       break;
 137    case GL_ZERO:
 138       dfop = STENCILOP_ZERO;
 139       break;
 140    case GL_REPLACE:
 141       dfop = STENCILOP_REPLACE;
 142       break;
 143    case GL_INCR:
 144       dfop = STENCILOP_INCRSAT;
 145       break;
 146    case GL_DECR:
 147       dfop = STENCILOP_DECRSAT;
 148       break;
 149    case GL_INCR_WRAP:
 150       dfop = STENCILOP_INCR;
 151       break;
 152    case GL_DECR_WRAP:
 153       dfop = STENCILOP_DECR;
 154       break;
 155    case GL_INVERT:
 156       dfop = STENCILOP_INVERT;
 157       break;
 158    default:
 159       break;
 160    }
 161    switch (zpass) {
 162    case GL_KEEP:
 163       dpop = STENCILOP_KEEP;
 164       break;
 165    case GL_ZERO:
 166       dpop = STENCILOP_ZERO;
 167       break;
 168    case GL_REPLACE:
 169       dpop = STENCILOP_REPLACE;
 170       break;
 171    case GL_INCR:
 172       dpop = STENCILOP_INCRSAT;
 173       break;
 174    case GL_DECR:
 175       dpop = STENCILOP_DECRSAT;
 176       break;
 177    case GL_INCR_WRAP:
 178       dpop = STENCILOP_INCR;
 179       break;
 180    case GL_DECR_WRAP:
 181       dpop = STENCILOP_DECR;
 182       break;
 183    case GL_INVERT:
 184       dpop = STENCILOP_INVERT;
 185       break;
 186    default:
 187       break;
 188    }
 189
 190
 191    I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 192    i830->state.Ctx[I830_CTXREG_STENCILTST] &= ~(STENCIL_OPS_MASK);
 193    i830->state.Ctx[I830_CTXREG_STENCILTST] |= (ENABLE_STENCIL_PARMS |
 194                                                STENCIL_FAIL_OP(fop) |
 195                                                STENCIL_PASS_DEPTH_FAIL_OP
 196                                                (dfop) |
 197                                                STENCIL_PASS_DEPTH_PASS_OP
 198                                                (dpop));
 199 }
 200
 201 static void
 202 i830AlphaFunc(GLcontext * ctx, GLenum func, GLfloat ref)
 203 {
 204    struct i830_context *i830 = i830_context(ctx);
 205    int test = intel_translate_compare_func(func);
 206    GLubyte refByte;
 207    GLuint refInt;
 208
 209    UNCLAMPED_FLOAT_TO_UBYTE(refByte, ref);
 210    refInt = (GLuint) refByte;
 211
 212    I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 213    i830->state.Ctx[I830_CTXREG_STATE2] &= ~ALPHA_TEST_REF_MASK;
 214    i830->state.Ctx[I830_CTXREG_STATE2] |= (ENABLE_ALPHA_TEST_FUNC |
 215                                            ENABLE_ALPHA_REF_VALUE |
 216                                            ALPHA_TEST_FUNC(test) |
 217                                            ALPHA_REF_VALUE(refInt));
 218 }
 219
 220 /**
 221  * Makes sure that the proper enables are set for LogicOp, Independant Alpha
 222  * Blend, and Blending.  It needs to be called from numerous places where we
 223  * could change the LogicOp or Independant Alpha Blend without subsequent
 224  * calls to glEnable.
 225  *
 226  * \todo
 227  * This function is substantially different from the old i830-specific driver.
 228  * I'm not sure which is correct.
 229  */
 230 static void
 231 i830EvalLogicOpBlendState(GLcontext * ctx)
 232 {
 233    struct i830_context *i830 = i830_context(ctx);
 234
 235    I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 236
 237    if (RGBA_LOGICOP_ENABLED(ctx)) {
 238       i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~(ENABLE_COLOR_BLEND |
 239                                                   ENABLE_LOGIC_OP_MASK);
 240       i830->state.Ctx[I830_CTXREG_ENABLES_1] |= (DISABLE_COLOR_BLEND |
 241                                                  ENABLE_LOGIC_OP);
 242    }
 243    else if (ctx->Color.BlendEnabled) {
 244       i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~(ENABLE_COLOR_BLEND |
 245                                                   ENABLE_LOGIC_OP_MASK);
 246       i830->state.Ctx[I830_CTXREG_ENABLES_1] |= (ENABLE_COLOR_BLEND |
 247                                                  DISABLE_LOGIC_OP);
 248    }
 249    else {
 250       i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~(ENABLE_COLOR_BLEND |
 251                                                   ENABLE_LOGIC_OP_MASK);
 252       i830->state.Ctx[I830_CTXREG_ENABLES_1] |= (DISABLE_COLOR_BLEND |
 253                                                  DISABLE_LOGIC_OP);
 254    }
 255 }
 256
 257 static void
 258 i830BlendColor(GLcontext * ctx, const GLfloat color[4])
 259 {
 260    struct i830_context *i830 = i830_context(ctx);
 261    GLubyte r, g, b, a;
 262
 263    DBG("%s\n", __FUNCTION__);
 264
 265    UNCLAMPED_FLOAT_TO_UBYTE(r, color[RCOMP]);
 266    UNCLAMPED_FLOAT_TO_UBYTE(g, color[GCOMP]);
 267    UNCLAMPED_FLOAT_TO_UBYTE(b, color[BCOMP]);
 268    UNCLAMPED_FLOAT_TO_UBYTE(a, color[ACOMP]);
 269
 270    I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 271    i830->state.Ctx[I830_CTXREG_BLENDCOLOR1] =
 272       (a << 24) | (r << 16) | (g << 8) | b;
 273 }
 274
 275 /**
 276  * Sets both the blend equation (called "function" in i830 docs) and the
 277  * blend function (called "factor" in i830 docs).  This is done in a single
 278  * function because some blend equations (i.e., \c GL_MIN and \c GL_MAX)
 279  * change the interpretation of the blend function.
 280  */
 281 static void
 282 i830_set_blend_state(GLcontext * ctx)
 283 {
 284    struct i830_context *i830 = i830_context(ctx);
 285    int funcA;
 286    int funcRGB;
 287    int eqnA;
 288    int eqnRGB;
 289    int iab;
 290    int s1;
 291
 292
 293    funcRGB =
 294       SRC_BLND_FACT(intel_translate_blend_factor(ctx->Color.BlendSrcRGB))
 295       | DST_BLND_FACT(intel_translate_blend_factor(ctx->Color.BlendDstRGB));
 296
 297    switch (ctx->Color.BlendEquationRGB) {
 298    case GL_FUNC_ADD:
 299       eqnRGB = BLENDFUNC_ADD;
 300       break;
 301    case GL_MIN:
 302       eqnRGB = BLENDFUNC_MIN;
 303       funcRGB = SRC_BLND_FACT(BLENDFACT_ONE) | DST_BLND_FACT(BLENDFACT_ONE);
 304       break;
 305    case GL_MAX:
 306       eqnRGB = BLENDFUNC_MAX;
 307       funcRGB = SRC_BLND_FACT(BLENDFACT_ONE) | DST_BLND_FACT(BLENDFACT_ONE);
 308       break;
 309    case GL_FUNC_SUBTRACT:
 310       eqnRGB = BLENDFUNC_SUB;
 311       break;
 312    case GL_FUNC_REVERSE_SUBTRACT:
 313       eqnRGB = BLENDFUNC_RVRSE_SUB;
 314       break;
 315    default:
 316       fprintf(stderr, "[%s:%u] Invalid RGB blend equation (0x%04x).\n",
 317               __FUNCTION__, __LINE__, ctx->Color.BlendEquationRGB);
 318       return;
 319    }
 320
 321
 322    funcA = SRC_ABLEND_FACT(intel_translate_blend_factor(ctx->Color.BlendSrcA))
 323       | DST_ABLEND_FACT(intel_translate_blend_factor(ctx->Color.BlendDstA));
 324
 325    switch (ctx->Color.BlendEquationA) {
 326    case GL_FUNC_ADD:
 327       eqnA = BLENDFUNC_ADD;
 328       break;
 329    case GL_MIN:
 330       eqnA = BLENDFUNC_MIN;
 331       funcA = SRC_BLND_FACT(BLENDFACT_ONE) | DST_BLND_FACT(BLENDFACT_ONE);
 332       break;
 333    case GL_MAX:
 334       eqnA = BLENDFUNC_MAX;
 335       funcA = SRC_BLND_FACT(BLENDFACT_ONE) | DST_BLND_FACT(BLENDFACT_ONE);
 336       break;
 337    case GL_FUNC_SUBTRACT:
 338       eqnA = BLENDFUNC_SUB;
 339       break;
 340    case GL_FUNC_REVERSE_SUBTRACT:
 341       eqnA = BLENDFUNC_RVRSE_SUB;
 342       break;
 343    default:
 344       fprintf(stderr, "[%s:%u] Invalid alpha blend equation (0x%04x).\n",
 345               __FUNCTION__, __LINE__, ctx->Color.BlendEquationA);
 346       return;
 347    }
 348
 349    iab = eqnA | funcA
 350       | _3DSTATE_INDPT_ALPHA_BLEND_CMD
 351       | ENABLE_SRC_ABLEND_FACTOR | ENABLE_DST_ABLEND_FACTOR
 352       | ENABLE_ALPHA_BLENDFUNC;
 353    s1 = eqnRGB | funcRGB
 354       | _3DSTATE_MODES_1_CMD
 355       | ENABLE_SRC_BLND_FACTOR | ENABLE_DST_BLND_FACTOR
 356       | ENABLE_COLR_BLND_FUNC;
 357
 358    if ((eqnA | funcA) != (eqnRGB | funcRGB))
 359       iab |= ENABLE_INDPT_ALPHA_BLEND;
 360    else
 361       iab |= DISABLE_INDPT_ALPHA_BLEND;
 362
 363    if (iab != i830->state.Ctx[I830_CTXREG_IALPHAB] ||
 364        s1 != i830->state.Ctx[I830_CTXREG_STATE1]) {
 365       I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 366       i830->state.Ctx[I830_CTXREG_IALPHAB] = iab;
 367       i830->state.Ctx[I830_CTXREG_STATE1] = s1;
 368    }
 369
 370    /* This will catch a logicop blend equation.  It will also ensure
 371     * independant alpha blend is really in the correct state (either enabled
 372     * or disabled) if blending is already enabled.
 373     */
 374
 375    i830EvalLogicOpBlendState(ctx);
 376
 377    if (0) {
 378       fprintf(stderr,
 379               "[%s:%u] STATE1: 0x%08x IALPHAB: 0x%08x blend is %sabled\n",
 380               __FUNCTION__, __LINE__, i830->state.Ctx[I830_CTXREG_STATE1],
 381               i830->state.Ctx[I830_CTXREG_IALPHAB],
 382               (ctx->Color.BlendEnabled) ? "en" : "dis");
 383    }
 384 }
 385
 386
 387 static void
 388 i830BlendEquationSeparate(GLcontext * ctx, GLenum modeRGB, GLenum modeA)
 389 {
 390    DBG("%s -> %s, %s\n", __FUNCTION__,
 391        _mesa_lookup_enum_by_nr(modeRGB),
 392        _mesa_lookup_enum_by_nr(modeA));
 393
 394    (void) modeRGB;
 395    (void) modeA;
 396    i830_set_blend_state(ctx);
 397 }
 398
 399
 400 static void
 401 i830BlendFuncSeparate(GLcontext * ctx, GLenum sfactorRGB,
 402                       GLenum dfactorRGB, GLenum sfactorA, GLenum dfactorA)
 403 {
 404    DBG("%s -> RGB(%s, %s) A(%s, %s)\n", __FUNCTION__,
 405        _mesa_lookup_enum_by_nr(sfactorRGB),
 406        _mesa_lookup_enum_by_nr(dfactorRGB),
 407        _mesa_lookup_enum_by_nr(sfactorA),
 408        _mesa_lookup_enum_by_nr(dfactorA));
 409
 410    (void) sfactorRGB;
 411    (void) dfactorRGB;
 412    (void) sfactorA;
 413    (void) dfactorA;
 414    i830_set_blend_state(ctx);
 415 }
 416
 417
 418
 419 static void
 420 i830DepthFunc(GLcontext * ctx, GLenum func)
 421 {
 422    struct i830_context *i830 = i830_context(ctx);
 423    int test = intel_translate_compare_func(func);
 424
 425    DBG("%s\n", __FUNCTION__);
 426
 427    I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 428    i830->state.Ctx[I830_CTXREG_STATE3] &= ~DEPTH_TEST_FUNC_MASK;
 429    i830->state.Ctx[I830_CTXREG_STATE3] |= (ENABLE_DEPTH_TEST_FUNC |
 430                                            DEPTH_TEST_FUNC(test));
 431 }
 432
 433 static void
 434 i830DepthMask(GLcontext * ctx, GLboolean flag)
 435 {
 436    struct i830_context *i830 = i830_context(ctx);
 437
 438    DBG("%s flag (%d)\n", __FUNCTION__, flag);
 439
 440    I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 441
 442    i830->state.Ctx[I830_CTXREG_ENABLES_2] &= ~ENABLE_DIS_DEPTH_WRITE_MASK;
 443
 444    if (flag && ctx->Depth.Test)
 445       i830->state.Ctx[I830_CTXREG_ENABLES_2] |= ENABLE_DEPTH_WRITE;
 446    else
 447       i830->state.Ctx[I830_CTXREG_ENABLES_2] |= DISABLE_DEPTH_WRITE;
 448 }
 449
 450 /** Called from ctx->Driver.Viewport() */
 451 static void
 452 i830Viewport(GLcontext * ctx,
 453               GLint x, GLint y, GLsizei width, GLsizei height)
 454 {
 455    intelCalcViewport(ctx);
 456
 457    intel_viewport(ctx, x, y, width, height);
 458 }
 459
 460
 461 /** Called from ctx->Driver.DepthRange() */
 462 static void
 463 i830DepthRange(GLcontext * ctx, GLclampd nearval, GLclampd farval)
 464 {
 465    intelCalcViewport(ctx);
 466 }
 467
 468 /* =============================================================
 469  * Polygon stipple
 470  *
 471  * The i830 supports a 4x4 stipple natively, GL wants 32x32.
 472  * Fortunately stipple is usually a repeating pattern.
 473  */
 474 static void
 475 i830PolygonStipple(GLcontext * ctx, const GLubyte * mask)
 476 {
 477    struct i830_context *i830 = i830_context(ctx);
 478    const GLubyte *m = mask;
 479    GLubyte p[4];
 480    int i, j, k;
 481    int active = (ctx->Polygon.StippleFlag &&
 482                  i830->intel.reduced_primitive == GL_TRIANGLES);
 483    GLuint newMask;
 484
 485    if (active) {
 486       I830_STATECHANGE(i830, I830_UPLOAD_STIPPLE);
 487       i830->state.Stipple[I830_STPREG_ST1] &= ~ST1_ENABLE;
 488    }
 489
 490    p[0] = mask[12] & 0xf;
 491    p[0] |= p[0] << 4;
 492    p[1] = mask[8] & 0xf;
 493    p[1] |= p[1] << 4;
 494    p[2] = mask[4] & 0xf;
 495    p[2] |= p[2] << 4;
 496    p[3] = mask[0] & 0xf;
 497    p[3] |= p[3] << 4;
 498
 499    for (k = 0; k < 8; k++)
 500       for (j = 3; j >= 0; j--)
 501          for (i = 0; i < 4; i++, m++)
 502             if (*m != p[j]) {
 503                i830->intel.hw_stipple = 0;
 504                return;
 505             }
 506
 507    newMask = (((p[0] & 0xf) << 0) |
 508               ((p[1] & 0xf) << 4) |
 509               ((p[2] & 0xf) << 8) | ((p[3] & 0xf) << 12));
 510
 511
 512    if (newMask == 0xffff || newMask == 0x0) {
 513       /* this is needed to make conform pass */
 514       i830->intel.hw_stipple = 0;
 515       return;
 516    }
 517
 518    i830->state.Stipple[I830_STPREG_ST1] &= ~0xffff;
 519    i830->state.Stipple[I830_STPREG_ST1] |= newMask;
 520    i830->intel.hw_stipple = 1;
 521
 522    if (active)
 523       i830->state.Stipple[I830_STPREG_ST1] |= ST1_ENABLE;
 524 }
 525
 526
 527 /* =============================================================
 528  * Hardware clipping
 529  */
 530 static void
 531 i830Scissor(GLcontext * ctx, GLint x, GLint y, GLsizei w, GLsizei h)
 532 {
 533    struct i830_context *i830 = i830_context(ctx);
 534    int x1, y1, x2, y2;
 535
 536    if (!ctx->DrawBuffer)
 537       return;
 538
 539    DBG("%s %d,%d %dx%d\n", __FUNCTION__, x, y, w, h);
 540
 541    if (ctx->DrawBuffer->Name == 0) {
 542       x1 = x;
 543       y1 = ctx->DrawBuffer->Height - (y + h);
 544       x2 = x + w - 1;
 545       y2 = y1 + h - 1;
 546       DBG("%s %d..%d,%d..%d (inverted)\n", __FUNCTION__, x1, x2, y1, y2);
 547    }
 548    else {
 549       /* FBO - not inverted
 550        */
 551       x1 = x;
 552       y1 = y;
 553       x2 = x + w - 1;
 554       y2 = y + h - 1;
 555       DBG("%s %d..%d,%d..%d (not inverted)\n", __FUNCTION__, x1, x2, y1, y2);
 556    }
 557
 558    x1 = CLAMP(x1, 0, ctx->DrawBuffer->Width - 1);
 559    y1 = CLAMP(y1, 0, ctx->DrawBuffer->Height - 1);
 560    x2 = CLAMP(x2, 0, ctx->DrawBuffer->Width - 1);
 561    y2 = CLAMP(y2, 0, ctx->DrawBuffer->Height - 1);
 562
 563    DBG("%s %d..%d,%d..%d (clamped)\n", __FUNCTION__, x1, x2, y1, y2);
 564
 565    I830_STATECHANGE(i830, I830_UPLOAD_BUFFERS);
 566    i830->state.Buffer[I830_DESTREG_SR1] = (y1 << 16) | (x1 & 0xffff);
 567    i830->state.Buffer[I830_DESTREG_SR2] = (y2 << 16) | (x2 & 0xffff);
 568 }
 569
 570 static void
 571 i830LogicOp(GLcontext * ctx, GLenum opcode)
 572 {
 573    struct i830_context *i830 = i830_context(ctx);
 574    int tmp = intel_translate_logic_op(opcode);
 575
 576    DBG("%s\n", __FUNCTION__);
 577
 578    I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 579    i830->state.Ctx[I830_CTXREG_STATE4] &= ~LOGICOP_MASK;
 580    i830->state.Ctx[I830_CTXREG_STATE4] |= LOGIC_OP_FUNC(tmp);
 581 }
 582
 583
 584
 585 static void
 586 i830CullFaceFrontFace(GLcontext * ctx, GLenum unused)
 587 {
 588    struct i830_context *i830 = i830_context(ctx);
 589    GLuint mode;
 590
 591    DBG("%s\n", __FUNCTION__);
 592
 593    if (!ctx->Polygon.CullFlag) {
 594       mode = CULLMODE_NONE;
 595    }
 596    else if (ctx->Polygon.CullFaceMode != GL_FRONT_AND_BACK) {
 597       mode = CULLMODE_CW;
 598
 599       if (ctx->Polygon.CullFaceMode == GL_FRONT)
 600          mode ^= (CULLMODE_CW ^ CULLMODE_CCW);
 601       if (ctx->Polygon.FrontFace != GL_CCW)
 602          mode ^= (CULLMODE_CW ^ CULLMODE_CCW);
 603    }
 604    else {
 605       mode = CULLMODE_BOTH;
 606    }
 607
 608    I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 609    i830->state.Ctx[I830_CTXREG_STATE3] &= ~CULLMODE_MASK;
 610    i830->state.Ctx[I830_CTXREG_STATE3] |= ENABLE_CULL_MODE | mode;
 611 }
 612
 613 static void
 614 i830LineWidth(GLcontext * ctx, GLfloat widthf)
 615 {
 616    struct i830_context *i830 = i830_context(ctx);
 617    int width;
 618    int state5;
 619
 620    DBG("%s\n", __FUNCTION__);
 621
 622    width = (int) (widthf * 2);
 623    width = CLAMP(width, 1, 15);
 624
 625    state5 = i830->state.Ctx[I830_CTXREG_STATE5] & ~FIXED_LINE_WIDTH_MASK;
 626    state5 |= (ENABLE_FIXED_LINE_WIDTH | FIXED_LINE_WIDTH(width));
 627
 628    if (state5 != i830->state.Ctx[I830_CTXREG_STATE5]) {
 629       I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 630       i830->state.Ctx[I830_CTXREG_STATE5] = state5;
 631    }
 632 }
 633
 634 static void
 635 i830PointSize(GLcontext * ctx, GLfloat size)
 636 {
 637    struct i830_context *i830 = i830_context(ctx);
 638    GLint point_size = (int) size;
 639
 640    DBG("%s\n", __FUNCTION__);
 641
 642    point_size = CLAMP(point_size, 1, 256);
 643    I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 644    i830->state.Ctx[I830_CTXREG_STATE5] &= ~FIXED_POINT_WIDTH_MASK;
 645    i830->state.Ctx[I830_CTXREG_STATE5] |= (ENABLE_FIXED_POINT_WIDTH |
 646                                            FIXED_POINT_WIDTH(point_size));
 647 }
 648
 649
 650 /* =============================================================
 651  * Color masks
 652  */
 653
 654 static void
 655 i830ColorMask(GLcontext * ctx,
 656               GLboolean r, GLboolean g, GLboolean b, GLboolean a)
 657 {
 658    struct i830_context *i830 = i830_context(ctx);
 659    GLuint tmp = 0;
 660
 661    DBG("%s r(%d) g(%d) b(%d) a(%d)\n", __FUNCTION__, r, g, b, a);
 662
 663    tmp = ((i830->state.Ctx[I830_CTXREG_ENABLES_2] & ~WRITEMASK_MASK) |
 664           ENABLE_COLOR_MASK |
 665           ENABLE_COLOR_WRITE |
 666           ((!r) << WRITEMASK_RED_SHIFT) |
 667           ((!g) << WRITEMASK_GREEN_SHIFT) |
 668           ((!b) << WRITEMASK_BLUE_SHIFT) | ((!a) << WRITEMASK_ALPHA_SHIFT));
 669
 670    if (tmp != i830->state.Ctx[I830_CTXREG_ENABLES_2]) {
 671       I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 672       i830->state.Ctx[I830_CTXREG_ENABLES_2] = tmp;
 673    }
 674 }
 675
 676 static void
 677 update_specular(GLcontext * ctx)
 678 {
 679    struct i830_context *i830 = i830_context(ctx);
 680
 681    I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 682    i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~ENABLE_SPEC_ADD_MASK;
 683
 684    if (NEED_SECONDARY_COLOR(ctx))
 685       i830->state.Ctx[I830_CTXREG_ENABLES_1] |= ENABLE_SPEC_ADD;
 686    else
 687       i830->state.Ctx[I830_CTXREG_ENABLES_1] |= DISABLE_SPEC_ADD;
 688 }
 689
 690 static void
 691 i830LightModelfv(GLcontext * ctx, GLenum pname, const GLfloat * param)
 692 {
 693    DBG("%s\n", __FUNCTION__);
 694
 695    if (pname == GL_LIGHT_MODEL_COLOR_CONTROL) {
 696       update_specular(ctx);
 697    }
 698 }
 699
 700 /* In Mesa 3.5 we can reliably do native flatshading.
 701  */
 702 static void
 703 i830ShadeModel(GLcontext * ctx, GLenum mode)
 704 {
 705    struct i830_context *i830 = i830_context(ctx);
 706    I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 707
 708
 709 #define SHADE_MODE_MASK ((1<<10)|(1<<8)|(1<<6)|(1<<4))
 710
 711    i830->state.Ctx[I830_CTXREG_STATE3] &= ~SHADE_MODE_MASK;
 712
 713    if (mode == GL_FLAT) {
 714       i830->state.Ctx[I830_CTXREG_STATE3] |=
 715          (ALPHA_SHADE_MODE(SHADE_MODE_FLAT) | FOG_SHADE_MODE(SHADE_MODE_FLAT)
 716           | SPEC_SHADE_MODE(SHADE_MODE_FLAT) |
 717           COLOR_SHADE_MODE(SHADE_MODE_FLAT));
 718    }
 719    else {
 720       i830->state.Ctx[I830_CTXREG_STATE3] |=
 721          (ALPHA_SHADE_MODE(SHADE_MODE_LINEAR) |
 722           FOG_SHADE_MODE(SHADE_MODE_LINEAR) |
 723           SPEC_SHADE_MODE(SHADE_MODE_LINEAR) |
 724           COLOR_SHADE_MODE(SHADE_MODE_LINEAR));
 725    }
 726 }
 727
 728 /* =============================================================
 729  * Fog
 730  */
 731 static void
 732 i830Fogfv(GLcontext * ctx, GLenum pname, const GLfloat * param)
 733 {
 734    struct i830_context *i830 = i830_context(ctx);
 735
 736    DBG("%s\n", __FUNCTION__);
 737
 738    if (pname == GL_FOG_COLOR) {
 739       GLuint color = (((GLubyte) (ctx->Fog.Color[0] * 255.0F) << 16) |
 740                       ((GLubyte) (ctx->Fog.Color[1] * 255.0F) << 8) |
 741                       ((GLubyte) (ctx->Fog.Color[2] * 255.0F) << 0));
 742
 743       I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 744       i830->state.Ctx[I830_CTXREG_FOGCOLOR] =
 745          (_3DSTATE_FOG_COLOR_CMD | color);
 746    }
 747 }
 748
 749 /* =============================================================
 750  */
 751
 752 static void
 753 i830Enable(GLcontext * ctx, GLenum cap, GLboolean state)
 754 {
 755    struct i830_context *i830 = i830_context(ctx);
 756
 757    switch (cap) {
 758    case GL_LIGHTING:
 759    case GL_COLOR_SUM:
 760       update_specular(ctx);
 761       break;
 762
 763    case GL_ALPHA_TEST:
 764       I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 765       i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~ENABLE_DIS_ALPHA_TEST_MASK;
 766       if (state)
 767          i830->state.Ctx[I830_CTXREG_ENABLES_1] |= ENABLE_ALPHA_TEST;
 768       else
 769          i830->state.Ctx[I830_CTXREG_ENABLES_1] |= DISABLE_ALPHA_TEST;
 770
 771       break;
 772
 773    case GL_BLEND:
 774       i830EvalLogicOpBlendState(ctx);
 775       break;
 776
 777    case GL_COLOR_LOGIC_OP:
 778       i830EvalLogicOpBlendState(ctx);
 779
 780       /* Logicop doesn't seem to work at 16bpp:
 781        */
 782       if (i830->intel.ctx.Visual.rgbBits == 16)
 783          FALLBACK(&i830->intel, I830_FALLBACK_LOGICOP, state);
 784       break;
 785
 786    case GL_DITHER:
 787       I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 788       i830->state.Ctx[I830_CTXREG_ENABLES_2] &= ~ENABLE_DITHER;
 789
 790       if (state)
 791          i830->state.Ctx[I830_CTXREG_ENABLES_2] |= ENABLE_DITHER;
 792       else
 793          i830->state.Ctx[I830_CTXREG_ENABLES_2] |= DISABLE_DITHER;
 794       break;
 795
 796    case GL_DEPTH_TEST:
 797       I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 798       i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~ENABLE_DIS_DEPTH_TEST_MASK;
 799
 800       if (state)
 801          i830->state.Ctx[I830_CTXREG_ENABLES_1] |= ENABLE_DEPTH_TEST;
 802       else
 803          i830->state.Ctx[I830_CTXREG_ENABLES_1] |= DISABLE_DEPTH_TEST;
 804
 805       /* Also turn off depth writes when GL_DEPTH_TEST is disabled:
 806        */
 807       i830DepthMask(ctx, ctx->Depth.Mask);
 808       break;
 809
 810    case GL_SCISSOR_TEST:
 811       I830_STATECHANGE(i830, I830_UPLOAD_BUFFERS);
 812
 813       if (state)
 814          i830->state.Buffer[I830_DESTREG_SENABLE] =
 815             (_3DSTATE_SCISSOR_ENABLE_CMD | ENABLE_SCISSOR_RECT);
 816       else
 817          i830->state.Buffer[I830_DESTREG_SENABLE] =
 818             (_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT);
 819
 820       break;
 821
 822    case GL_LINE_SMOOTH:
 823       I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 824
 825       i830->state.Ctx[I830_CTXREG_AA] &= ~AA_LINE_ENABLE;
 826       if (state)
 827          i830->state.Ctx[I830_CTXREG_AA] |= AA_LINE_ENABLE;
 828       else
 829          i830->state.Ctx[I830_CTXREG_AA] |= AA_LINE_DISABLE;
 830       break;
 831
 832    case GL_FOG:
 833       I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 834       i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~ENABLE_DIS_FOG_MASK;
 835       if (state)
 836          i830->state.Ctx[I830_CTXREG_ENABLES_1] |= ENABLE_FOG;
 837       else
 838          i830->state.Ctx[I830_CTXREG_ENABLES_1] |= DISABLE_FOG;
 839       break;
 840
 841    case GL_CULL_FACE:
 842       i830CullFaceFrontFace(ctx, 0);
 843       break;
 844
 845    case GL_TEXTURE_2D:
 846       break;
 847
 848    case GL_STENCIL_TEST:
 849       {
 850          GLboolean hw_stencil = GL_FALSE;
 851          if (ctx->DrawBuffer) {
 852             struct intel_renderbuffer *irbStencil
 853                = intel_get_renderbuffer(ctx->DrawBuffer, BUFFER_STENCIL);
 854             hw_stencil = (irbStencil && irbStencil->region);
 855          }
 856          if (hw_stencil) {
 857             I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 858
 859             if (state) {
 860                i830->state.Ctx[I830_CTXREG_ENABLES_1] |= ENABLE_STENCIL_TEST;
 861                i830->state.Ctx[I830_CTXREG_ENABLES_2] |= ENABLE_STENCIL_WRITE;
 862             }
 863             else {
 864                i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~ENABLE_STENCIL_TEST;
 865                i830->state.Ctx[I830_CTXREG_ENABLES_2] &=
 866                   ~ENABLE_STENCIL_WRITE;
 867                i830->state.Ctx[I830_CTXREG_ENABLES_1] |= DISABLE_STENCIL_TEST;
 868                i830->state.Ctx[I830_CTXREG_ENABLES_2] |=
 869                   DISABLE_STENCIL_WRITE;
 870             }
 871          }
 872          else {
 873             FALLBACK(&i830->intel, I830_FALLBACK_STENCIL, state);
 874          }
 875       }
 876       break;
 877
 878    case GL_POLYGON_STIPPLE:
 879       /* The stipple command worked on my 855GM box, but not my 845G.
 880        * I'll do more testing later to find out exactly which hardware
 881        * supports it.  Disabled for now.
 882        */
 883       if (i830->intel.hw_stipple &&
 884           i830->intel.reduced_primitive == GL_TRIANGLES) {
 885          I830_STATECHANGE(i830, I830_UPLOAD_STIPPLE);
 886          i830->state.Stipple[I830_STPREG_ST1] &= ~ST1_ENABLE;
 887          if (state)
 888             i830->state.Stipple[I830_STPREG_ST1] |= ST1_ENABLE;
 889       }
 890       break;
 891
 892    default:
 893       ;
 894    }
 895 }
 896
 897
 898 static void
 899 i830_init_packets(struct i830_context *i830)
 900 {
 901    /* Zero all state */
 902    memset(&i830->state, 0, sizeof(i830->state));
 903
 904    /* Set default blend state */
 905    i830->state.TexBlend[0][0] = (_3DSTATE_MAP_BLEND_OP_CMD(0) |
 906                                  TEXPIPE_COLOR |
 907                                  ENABLE_TEXOUTPUT_WRT_SEL |
 908                                  TEXOP_OUTPUT_CURRENT |
 909                                  DISABLE_TEX_CNTRL_STAGE |
 910                                  TEXOP_SCALE_1X |
 911                                  TEXOP_MODIFY_PARMS |
 912                                  TEXOP_LAST_STAGE | TEXBLENDOP_ARG1);
 913    i830->state.TexBlend[0][1] = (_3DSTATE_MAP_BLEND_OP_CMD(0) |
 914                                  TEXPIPE_ALPHA |
 915                                  ENABLE_TEXOUTPUT_WRT_SEL |
 916                                  TEXOP_OUTPUT_CURRENT |
 917                                  TEXOP_SCALE_1X |
 918                                  TEXOP_MODIFY_PARMS | TEXBLENDOP_ARG1);
 919    i830->state.TexBlend[0][2] = (_3DSTATE_MAP_BLEND_ARG_CMD(0) |
 920                                  TEXPIPE_COLOR |
 921                                  TEXBLEND_ARG1 |
 922                                  TEXBLENDARG_MODIFY_PARMS |
 923                                  TEXBLENDARG_DIFFUSE);
 924    i830->state.TexBlend[0][3] = (_3DSTATE_MAP_BLEND_ARG_CMD(0) |
 925                                  TEXPIPE_ALPHA |
 926                                  TEXBLEND_ARG1 |
 927                                  TEXBLENDARG_MODIFY_PARMS |
 928                                  TEXBLENDARG_DIFFUSE);
 929
 930    i830->state.TexBlendWordsUsed[0] = 4;
 931
 932
 933    i830->state.Ctx[I830_CTXREG_VF] = 0;
 934    i830->state.Ctx[I830_CTXREG_VF2] = 0;
 935
 936    i830->state.Ctx[I830_CTXREG_AA] = (_3DSTATE_AA_CMD |
 937                                       AA_LINE_ECAAR_WIDTH_ENABLE |
 938                                       AA_LINE_ECAAR_WIDTH_1_0 |
 939                                       AA_LINE_REGION_WIDTH_ENABLE |
 940                                       AA_LINE_REGION_WIDTH_1_0 |
 941                                       AA_LINE_DISABLE);
 942
 943    i830->state.Ctx[I830_CTXREG_ENABLES_1] = (_3DSTATE_ENABLES_1_CMD |
 944                                              DISABLE_LOGIC_OP |
 945                                              DISABLE_STENCIL_TEST |
 946                                              DISABLE_DEPTH_BIAS |
 947                                              DISABLE_SPEC_ADD |
 948                                              DISABLE_FOG |
 949                                              DISABLE_ALPHA_TEST |
 950                                              DISABLE_COLOR_BLEND |
 951                                              DISABLE_DEPTH_TEST);
 952
 953 #if 000                         /* XXX all the stencil enable state is set in i830Enable(), right? */
 954    if (i830->intel.hw_stencil) {
 955       i830->state.Ctx[I830_CTXREG_ENABLES_2] = (_3DSTATE_ENABLES_2_CMD |
 956                                                 ENABLE_STENCIL_WRITE |
 957                                                 ENABLE_TEX_CACHE |
 958                                                 ENABLE_DITHER |
 959                                                 ENABLE_COLOR_MASK |
 960                                                 /* set no color comps disabled */
 961                                                 ENABLE_COLOR_WRITE |
 962                                                 ENABLE_DEPTH_WRITE);
 963    }
 964    else
 965 #endif
 966    {
 967       i830->state.Ctx[I830_CTXREG_ENABLES_2] = (_3DSTATE_ENABLES_2_CMD |
 968                                                 DISABLE_STENCIL_WRITE |
 969                                                 ENABLE_TEX_CACHE |
 970                                                 ENABLE_DITHER |
 971                                                 ENABLE_COLOR_MASK |
 972                                                 /* set no color comps disabled */
 973                                                 ENABLE_COLOR_WRITE |
 974                                                 ENABLE_DEPTH_WRITE);
 975    }
 976
 977    i830->state.Ctx[I830_CTXREG_STATE1] = (_3DSTATE_MODES_1_CMD |
 978                                           ENABLE_COLR_BLND_FUNC |
 979                                           BLENDFUNC_ADD |
 980                                           ENABLE_SRC_BLND_FACTOR |
 981                                           SRC_BLND_FACT(BLENDFACT_ONE) |
 982                                           ENABLE_DST_BLND_FACTOR |
 983                                           DST_BLND_FACT(BLENDFACT_ZERO));
 984
 985    i830->state.Ctx[I830_CTXREG_STATE2] = (_3DSTATE_MODES_2_CMD |
 986                                           ENABLE_GLOBAL_DEPTH_BIAS |
 987                                           GLOBAL_DEPTH_BIAS(0) |
 988                                           ENABLE_ALPHA_TEST_FUNC |
 989                                           ALPHA_TEST_FUNC(COMPAREFUNC_ALWAYS)
 990                                           | ALPHA_REF_VALUE(0));
 991
 992    i830->state.Ctx[I830_CTXREG_STATE3] = (_3DSTATE_MODES_3_CMD |
 993                                           ENABLE_DEPTH_TEST_FUNC |
 994                                           DEPTH_TEST_FUNC(COMPAREFUNC_LESS) |
 995                                           ENABLE_ALPHA_SHADE_MODE |
 996                                           ALPHA_SHADE_MODE(SHADE_MODE_LINEAR)
 997                                           | ENABLE_FOG_SHADE_MODE |
 998                                           FOG_SHADE_MODE(SHADE_MODE_LINEAR) |
 999                                           ENABLE_SPEC_SHADE_MODE |
1000                                           SPEC_SHADE_MODE(SHADE_MODE_LINEAR) |
1001                                           ENABLE_COLOR_SHADE_MODE |
1002                                           COLOR_SHADE_MODE(SHADE_MODE_LINEAR)
1003                                           | ENABLE_CULL_MODE | CULLMODE_NONE);
1004
1005    i830->state.Ctx[I830_CTXREG_STATE4] = (_3DSTATE_MODES_4_CMD |
1006                                           ENABLE_LOGIC_OP_FUNC |
1007                                           LOGIC_OP_FUNC(LOGICOP_COPY) |
1008                                           ENABLE_STENCIL_TEST_MASK |
1009                                           STENCIL_TEST_MASK(0xff) |
1010                                           ENABLE_STENCIL_WRITE_MASK |
1011                                           STENCIL_WRITE_MASK(0xff));
1012
1013    i830->state.Ctx[I830_CTXREG_STENCILTST] = (_3DSTATE_STENCIL_TEST_CMD |
1014                                               ENABLE_STENCIL_PARMS |
1015                                               STENCIL_FAIL_OP(STENCILOP_KEEP)
1016                                               |
1017                                               STENCIL_PASS_DEPTH_FAIL_OP
1018                                               (STENCILOP_KEEP) |
1019                                               STENCIL_PASS_DEPTH_PASS_OP
1020                                               (STENCILOP_KEEP) |
1021                                               ENABLE_STENCIL_TEST_FUNC |
1022                                               STENCIL_TEST_FUNC
1023                                               (COMPAREFUNC_ALWAYS) |
1024                                               ENABLE_STENCIL_REF_VALUE |
1025                                               STENCIL_REF_VALUE(0));
1026
1027    i830->state.Ctx[I830_CTXREG_STATE5] = (_3DSTATE_MODES_5_CMD | FLUSH_TEXTURE_CACHE | ENABLE_SPRITE_POINT_TEX | SPRITE_POINT_TEX_OFF | ENABLE_FIXED_LINE_WIDTH | FIXED_LINE_WIDTH(0x2) |       /* 1.0 */
1028                                           ENABLE_FIXED_POINT_WIDTH |
1029                                           FIXED_POINT_WIDTH(1));
1030
1031    i830->state.Ctx[I830_CTXREG_IALPHAB] = (_3DSTATE_INDPT_ALPHA_BLEND_CMD |
1032                                            DISABLE_INDPT_ALPHA_BLEND |
1033                                            ENABLE_ALPHA_BLENDFUNC |
1034                                            ABLENDFUNC_ADD);
1035
1036    i830->state.Ctx[I830_CTXREG_FOGCOLOR] = (_3DSTATE_FOG_COLOR_CMD |
1037                                             FOG_COLOR_RED(0) |
1038                                             FOG_COLOR_GREEN(0) |
1039                                             FOG_COLOR_BLUE(0));
1040
1041    i830->state.Ctx[I830_CTXREG_BLENDCOLOR0] = _3DSTATE_CONST_BLEND_COLOR_CMD;
1042    i830->state.Ctx[I830_CTXREG_BLENDCOLOR1] = 0;
1043
1044    i830->state.Ctx[I830_CTXREG_MCSB0] = _3DSTATE_MAP_COORD_SETBIND_CMD;
1045    i830->state.Ctx[I830_CTXREG_MCSB1] = (TEXBIND_SET3(TEXCOORDSRC_VTXSET_3) |
1046                                          TEXBIND_SET2(TEXCOORDSRC_VTXSET_2) |
1047                                          TEXBIND_SET1(TEXCOORDSRC_VTXSET_1) |
1048                                          TEXBIND_SET0(TEXCOORDSRC_VTXSET_0));
1049
1050    i830->state.RasterRules[I830_RASTER_RULES] = (_3DSTATE_RASTER_RULES_CMD |
1051                                                  ENABLE_POINT_RASTER_RULE |
1052                                                  OGL_POINT_RASTER_RULE |
1053                                                  ENABLE_LINE_STRIP_PROVOKE_VRTX |
1054                                                  ENABLE_TRI_FAN_PROVOKE_VRTX |
1055                                                  ENABLE_TRI_STRIP_PROVOKE_VRTX |
1056                                                  LINE_STRIP_PROVOKE_VRTX(1) |
1057                                                  TRI_FAN_PROVOKE_VRTX(2) |
1058                                                  TRI_STRIP_PROVOKE_VRTX(2));
1059
1060
1061    i830->state.Stipple[I830_STPREG_ST0] = _3DSTATE_STIPPLE;
1062
1063    i830->state.Buffer[I830_DESTREG_DV0] = _3DSTATE_DST_BUF_VARS_CMD;
1064    i830->state.Buffer[I830_DESTREG_SENABLE] = (_3DSTATE_SCISSOR_ENABLE_CMD |
1065                                                DISABLE_SCISSOR_RECT);
1066    i830->state.Buffer[I830_DESTREG_SR0] = _3DSTATE_SCISSOR_RECT_0_CMD;
1067    i830->state.Buffer[I830_DESTREG_SR1] = 0;
1068    i830->state.Buffer[I830_DESTREG_SR2] = 0;
1069 }
1070
1071 void
1072 i830_update_provoking_vertex(GLcontext * ctx)
1073 {
1074    struct i830_context *i830 = i830_context(ctx);
1075
1076    I830_STATECHANGE(i830, I830_UPLOAD_RASTER_RULES);
1077    i830->state.RasterRules[I830_RASTER_RULES] &= ~(LINE_STRIP_PROVOKE_VRTX_MASK |
1078                                                    TRI_FAN_PROVOKE_VRTX_MASK |
1079                                                    TRI_STRIP_PROVOKE_VRTX_MASK);
1080
1081    /* _NEW_LIGHT */
1082    if (ctx->Light.ProvokingVertex == GL_LAST_VERTEX_CONVENTION) {
1083       i830->state.RasterRules[I830_RASTER_RULES] |= (LINE_STRIP_PROVOKE_VRTX(1) |
1084                                                      TRI_FAN_PROVOKE_VRTX(2) |
1085                                                      TRI_STRIP_PROVOKE_VRTX(2));
1086    } else {
1087       i830->state.RasterRules[I830_RASTER_RULES] |= (LINE_STRIP_PROVOKE_VRTX(0) |
1088                                                      TRI_FAN_PROVOKE_VRTX(1) |
1089                                                      TRI_STRIP_PROVOKE_VRTX(0));
1090     }
1091 }
1092
1093 void
1094 i830InitStateFuncs(struct dd_function_table *functions)
1095 {
1096    functions->AlphaFunc = i830AlphaFunc;
1097    functions->BlendColor = i830BlendColor;
1098    functions->BlendEquationSeparate = i830BlendEquationSeparate;
1099    functions->BlendFuncSeparate = i830BlendFuncSeparate;
1100    functions->ColorMask = i830ColorMask;
1101    functions->CullFace = i830CullFaceFrontFace;
1102    functions->DepthFunc = i830DepthFunc;
1103    functions->DepthMask = i830DepthMask;
1104    functions->Enable = i830Enable;
1105    functions->Fogfv = i830Fogfv;
1106    functions->FrontFace = i830CullFaceFrontFace;
1107    functions->LightModelfv = i830LightModelfv;
1108    functions->LineWidth = i830LineWidth;
1109    functions->LogicOpcode = i830LogicOp;
1110    functions->PointSize = i830PointSize;
1111    functions->PolygonStipple = i830PolygonStipple;
1112    functions->Scissor = i830Scissor;
1113    functions->ShadeModel = i830ShadeModel;
1114    functions->StencilFuncSeparate = i830StencilFuncSeparate;
1115    functions->StencilMaskSeparate = i830StencilMaskSeparate;
1116    functions->StencilOpSeparate = i830StencilOpSeparate;
1117    functions->DepthRange = i830DepthRange;
1118    functions->Viewport = i830Viewport;
1119 }
1120
1121 void
1122 i830InitState(struct i830_context *i830)
1123 {
1124    GLcontext *ctx = &i830->intel.ctx;
1125
1126    i830_init_packets(i830);
1127
1128    _mesa_init_driver_state(ctx);
1129
1130    i830->state.emitted = 0;
1131    i830->state.active = (I830_UPLOAD_INVARIENT |
1132                          I830_UPLOAD_RASTER_RULES |
1133                          I830_UPLOAD_TEXBLEND(0) |
1134                          I830_UPLOAD_STIPPLE |
1135                          I830_UPLOAD_CTX | I830_UPLOAD_BUFFERS);
1136 }