arch-arm: Add destRegIdxArr arrays to TME instructions

This is needed as the base StaticInst class is no longer holding the
index array and it is up to the derived class to allocate the
storage depending on the number of registers used

Change-Id: I389e39a7e09d31f370d63a6e61fe6ee3faaac7db
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/40375
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>

diff --git a/src/arch/arm/insts/tme64.cc b/src/arch/arm/insts/tme64.cc
index d32e8c9f8e3560a6e38cbe76632e1f14883ce221..85ffd6dfb735b79f57d2df72891a9f6d66d359d4 100644 (file)
--- a/src/arch/arm/insts/tme64.cc
+++ b/src/arch/arm/insts/tme64.cc
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2020 ARM Limited
+ * Copyright (c) 2020-2021 ARM Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -116,6 +116,12 @@ MicroTfence64::completeAcc(PacketPtr pkt, ExecContext *xc,
 Tstart64::Tstart64(ExtMachInst machInst, IntRegIndex _dest)
     : TmeRegNone64("tstart", machInst, MemReadOp, _dest)
 {
+    setRegIdxArrays(
+        nullptr,
+        reinterpret_cast<RegIdArrayPtr>(
+            &std::remove_pointer_t<decltype(this)>::destRegIdxArr));
+            ;
+
     _numSrcRegs = 0;
     _numDestRegs = 0;
     _numFPDestRegs = 0;
@@ -144,6 +150,12 @@ Tstart64::execute(
 Ttest64::Ttest64(ExtMachInst machInst, IntRegIndex _dest)
     : TmeRegNone64("ttest", machInst, MemReadOp, _dest)
 {
+    setRegIdxArrays(
+        nullptr,
+        reinterpret_cast<RegIdArrayPtr>(
+            &std::remove_pointer_t<decltype(this)>::destRegIdxArr));
+            ;
+
     _numSrcRegs = 0;
     _numDestRegs = 0;
     _numFPDestRegs = 0;

diff --git a/src/arch/arm/insts/tme64.hh b/src/arch/arm/insts/tme64.hh
index b75adc1e67c3eef982f8b1d91d62d2cb322160b9..0a1e02cfda06b48776810216d25f16ea3b9c2b50 100644 (file)
--- a/src/arch/arm/insts/tme64.hh
+++ b/src/arch/arm/insts/tme64.hh
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2020 ARM Limited
+ * Copyright (c) 2020-2021 ARM Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -97,6 +97,9 @@ class TmeRegNone64 : public ArmISA::ArmStaticInst
 
 class Tstart64 : public TmeRegNone64
 {
+  private:
+    RegId destRegIdxArr[1];
+
   public:
     Tstart64(ArmISA::ExtMachInst, ArmISA::IntRegIndex);
 
@@ -107,6 +110,9 @@ class Tstart64 : public TmeRegNone64
 
 class Ttest64 : public TmeRegNone64
 {
+  private:
+    RegId destRegIdxArr[1];
+
   public:
     Ttest64(ArmISA::ExtMachInst, ArmISA::IntRegIndex);