yield from alusim.check(dut)
- for i in range(10):
+ for i in range(5):
src1 = randint(1, dut.n_regs-1)
src2 = randint(1, dut.n_regs-1)
while True:
yield dut.int_insn_i[i].eq(0)
yield
yield
+ yield
yield
go_wr_o = intpick1.go_wr_o
go_rd_i = intfudeps.go_rd_i
go_wr_i = intfudeps.go_wr_i
- m.d.comb += go_rd_i[0].eq(go_rd_o[0]) # add rd
- m.d.comb += go_wr_i[0].eq(go_wr_o[0]) # add wr
-
- m.d.comb += go_rd_i[1].eq(go_rd_o[1]) # sub rd
- m.d.comb += go_wr_i[1].eq(go_wr_o[1]) # sub wr
+ m.d.comb += go_rd_i[0:2].eq(go_rd_o[0:2]) # add rd
+ m.d.comb += go_wr_i[0:2].eq(go_wr_o[0:2]) # add wr
m.d.comb += intfudeps.issue_i.eq(fn_issue_o)
yield dut.intregs.regs[i].reg.eq(i*2)
alusim.setval(i, i*2)
- yield
- yield
-
if False:
yield from int_instr(dut, alusim, IADD, 4, 3, 5)
yield from print_reg(dut, [3,4,5])
yield from alusim.check(dut)
- for i in range(5):
+ for i in range(1):
src1 = randint(1, dut.n_regs-1)
src2 = randint(1, dut.n_regs-1)
while True:
for i in range(len(dut.int_insn_i)):
yield dut.int_insn_i[i].eq(0)
yield
+ yield
yield