add qspi interface

diff --git a/src/bsv/bsv_lib/slow_peripherals_template.bsv b/src/bsv/bsv_lib/slow_peripherals_template.bsv
index fc4230e897aa474efd72c3b133614ce6b815044c..67217ec65d132e268c4806432af25580be976486 100644 (file)
--- a/src/bsv/bsv_lib/slow_peripherals_template.bsv
+++ b/src/bsv/bsv_lib/slow_peripherals_template.bsv
@@ -139,7 +139,7 @@ package slow_peripherals;
       `ifdef verbose $display("Dequeing the FIFO -- PLIC Interrupt Serviced id: %d",id); `endif
                endrule
 
-    for(Integer i=0; i <`NUM_INTERRUPTS; i=i+1) begin
+    for(Integer i=0; i <`INTERRUPT_PINS; i=i+1) begin
            rule deq_gateway_queue;
                    if(interrupt_id==fromInteger(i)) begin
                            ff_gateway_queue[i].deq;

diff --git a/src/bsv/peripheral_gen.py b/src/bsv/peripheral_gen.py
index 11d3b86045edc8c1ccfdeb912a01dcd7556ad9c6..aabfd8f26a4d5f822ee272f37ee59fd149b43e56 100644 (file)
--- a/src/bsv/peripheral_gen.py
+++ b/src/bsv/peripheral_gen.py
@@ -171,7 +171,7 @@ class PBase(object):
             name = "{0}{1}".format(self.name, self.mksuffix(self.name, inum))
             plic_obj = self.plic_object(name, idx)
             print "plic_obj", name, idx, plic_obj
-            plic = mkplic_rule.format(self.name, plic_obj, irq_offs)
+            plic = mkplic_rule.format(name, plic_obj, irq_offs)
             res.append(plic)
             irq_offs += 1 # increment to next irq
         return ('\n'.join(res), irq_offs)
@@ -298,9 +298,6 @@ class twi(PBase):
         return "            interface I2C_out twi{0}_out;\n" + \
                "            method Bit#(1) twi{0}_isint;"
 
-    def num_irqs(self):
-        return 3
-
     def num_axi_regs32(self):
         return 8
 
@@ -327,6 +324,9 @@ class twi(PBase):
             return "pack({0})".format(txt)
         return txt
 
+    def num_irqs(self):
+        return 3
+
     def plic_object(self, pname, idx):
         return ["{0}.isint()",
                 "{0}.timerint()",
@@ -563,6 +563,12 @@ class qspi(PBase):
         ret.append("    endrule")
         return '\n'.join(ret)
 
+    def num_irqs(self):
+        return 6
+
+    def plic_object(self, pname, idx):
+        return "{0}.interrupts()[{1}]".format(pname, idx)
+
 
 class pwm(PBase):