put RB in 2nd position (matching immediate) in ShiftRot Input Data

diff --git a/src/soc/fu/shift_rot/pipe_data.py b/src/soc/fu/shift_rot/pipe_data.py
index 49b7b9c580d45c4b1db81f8f2b406491a776861e..74d56bfee3555690372b298e8993acdc7e9c8b3a 100644 (file)
--- a/src/soc/fu/shift_rot/pipe_data.py
+++ b/src/soc/fu/shift_rot/pipe_data.py
@@ -9,21 +9,21 @@ from nmutil.dynamicpipe import SimpleHandshakeRedir
 
 class ShiftRotInputData(IntegerData):
     regspec = [('INT', 'a', '0:63'),
-               ('INT', 'rs', '0:63'),
                ('INT', 'rb', '0:63'),
+               ('INT', 'rs', '0:63'),
                ('XER', 'xer_ca', '34,45')]
     def __init__(self, pspec):
         super().__init__(pspec)
         self.a = Signal(64, reset_less=True) # RA
-        self.rs = Signal(64, reset_less=True) # RS
         self.rb = Signal(64, reset_less=True) # RB/immediate
+        self.rs = Signal(64, reset_less=True) # RS
         self.xer_ca = Signal(2, reset_less=True) # XER bit 34/45: CA/CA32
 
     def __iter__(self):
         yield from super().__iter__()
         yield self.a
-        yield self.rs
         yield self.rb
+        yield self.rs
         yield self.xer_ca
 
     def eq(self, i):