remove unneeded imports
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Wed, 29 May 2019 23:41:04 +0000 (00:41 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Wed, 29 May 2019 23:41:04 +0000 (00:41 +0100)
src/scoreboard/fu_fu_matrix.py
src/scoreboard/fu_reg_matrix.py
src/scoreboard/global_pending.py

index 246115135e199a378c1bbd683411b2b67ec1d8ea..1f996631f983ab9105d50f2a9e1219f5fec5f23a 100644 (file)
@@ -2,7 +2,6 @@ from nmigen.compat.sim import run_simulation
 from nmigen.cli import verilog, rtlil
 from nmigen import Module, Signal, Elaboratable, Array, Cat, Const
 
-#from nmutil.latch import SRLatch
 from .fu_dep_cell import FUDependenceCell
 from .fu_picker_vec import FU_Pick_Vec
 
index f774fb9f544b0b49d439ee7b7f3e8cb441bdd84b..72b0ba4d1d4c39281394c30c38c4252dba7067c8 100644 (file)
@@ -2,7 +2,6 @@ from nmigen.compat.sim import run_simulation
 from nmigen.cli import verilog, rtlil
 from nmigen import Module, Signal, Elaboratable, Array, Cat
 
-#from nmutil.latch import SRLatch
 from scoreboard.dependence_cell import DependencyRow
 from scoreboard.fu_wr_pending import FU_RW_Pend
 from scoreboard.reg_select import Reg_Rsv
index 51a05d3adadeb55329fc1e59bf65754240f5bec8..540f44306132e2fc0b7c62a730fb929d7a61ec24 100644 (file)
@@ -1,7 +1,6 @@
 from nmigen.compat.sim import run_simulation
 from nmigen.cli import verilog, rtlil
 from nmigen import Module, Signal, Cat, Elaboratable
-from nmutil.latch import SRLatch
 
 
 class GlobalPending(Elaboratable):