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added comment to teststate
author
klehman
<klehman9@comcast.net>
Thu, 7 Oct 2021 15:57:39 +0000
(11:57 -0400)
committer
Luke Kenneth Casson Leighton
<lkcl@lkcl.net>
Fri, 8 Oct 2021 13:30:35 +0000
(14:30 +0100)
src/soc/simple/test/teststate.py
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diff --git
a/src/soc/simple/test/teststate.py
b/src/soc/simple/test/teststate.py
index 3a65c9dc7628f27c72963392c72470e003411777..d2f4b51ff74b865c0e758c34e49db1f92f094634 100644
(file)
--- a/
src/soc/simple/test/teststate.py
+++ b/
src/soc/simple/test/teststate.py
@@
-12,6
+12,9
@@
from openpower.test.state import (State, state_add, state_factory,
from soc.fu.compunits.test.test_compunit import get_l0_mem
class HDLState(State):
+ """HDLState: Obtains registers and memory from an nmigen simulator
+ object by implementing State class methods.
+ """
def __init__(self, core):
super().__init__()
self.core = core