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increase core size yet again, shrink gap
author
Luke Kenneth Casson Leighton
<lkcl@lkcl.net>
Fri, 13 Nov 2020 18:39:44 +0000
(18:39 +0000)
committer
Luke Kenneth Casson Leighton
<lkcl@lkcl.net>
Fri, 13 Nov 2020 18:39:44 +0000
(18:39 +0000)
experiments9/doDesign.py
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diff --git
a/experiments9/doDesign.py
b/experiments9/doDesign.py
index dc9f877c2798e94eb2e4ea0e1003e4be9130f9c6..577947ff740170ab4b96580de81f5dbb23485d24 100644
(file)
--- a/
experiments9/doDesign.py
+++ b/
experiments9/doDesign.py
@@
-134,7
+134,7
@@
def scriptMain (**kw):
"""The mandatory function to be called by Coriolis CGT/Unicorn."""
global af
rvalue = True
- sz = 25
2
00 # core size
+ sz = 25
5
00 # core size
try:
helpers.setTraceLevel(550)
usePadsPosition = True
@@
-161,7
+161,7
@@
def scriptMain (**kw):
ls180Conf.chipConf.name = 'chip'
ls180Conf.chipConf.ioPadGauge = 'niolib'
ls180Conf.coreSize = (l(sz), l(sz))
- ls180Conf.chipSize = (l(sz+3
400), l(sz+340
0))
+ ls180Conf.chipSize = (l(sz+3
350), l(sz+335
0))
ls180ToChip = CoreToChip(ls180Conf)
ls180ToChip.buildChip()
chipBuilder = Chip(ls180Conf)