connect mmu_done, ldst_error, cache_paradox

diff --git a/src/soc/experiment/pimem.py b/src/soc/experiment/pimem.py
index 664ee8175c2e6d7fa9034b6e786f74c4d62dd4b1..f8a05992b2b49ae29fdcbf7b704d179a9224c6db 100644 (file)
--- a/src/soc/experiment/pimem.py
+++ b/src/soc/experiment/pimem.py
@@ -140,6 +140,9 @@ class PortInterface(RecordObject):
                 inport.busy_o.eq(self.busy_o),
                 inport.addr_ok_o.eq(self.addr_ok_o),
                 inport.exception_o.eq(self.exception_o),
+                inport.mmu_done.eq(self.mmu_done),
+                inport.ldst_error.eq(self.ldst_error),
+                inport.cache_paradox.eq(self.cache_paradox)
                 ]