debug prints
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Thu, 11 Nov 2021 16:14:58 +0000 (16:14 +0000)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Thu, 11 Nov 2021 16:14:58 +0000 (16:14 +0000)
src/soc/simple/core.py

index d01490648a0ff8d603168551627a300f24a3026b..8082976116f7796346d78236d834ccab8ced5afb 100644 (file)
@@ -647,7 +647,7 @@ class NonProductionCore(ControlBase):
                 print("  %s" % regname, wid, read, write, rdflag)
                 for (funame, fu, idx) in fuspec:
                     fusig = fu.src_i[idx] if readmode else fu.dest[idx]
-                    print("    ", funame, fu, idx, fusig)
+                    print("    ", funame, fu.__class__.__name__, idx, fusig)
                     print()
 
         return byregfiles, byregfiles_spec