4k SRAM Instance needs write-enable @ 8-bit width

diff --git a/src/soc/bus/SPBlock512W64B8W.py b/src/soc/bus/SPBlock512W64B8W.py
index 02c4760cea80b847b03d9595593217d62fecfb64..b86a78b389e176510e45d6404655644e9b95f980 100644 (file)
--- a/src/soc/bus/SPBlock512W64B8W.py
+++ b/src/soc/bus/SPBlock512W64B8W.py
@@ -38,7 +38,7 @@ class SPBlock512W64B8W(Elaboratable):
 
         # 4k SRAM instance
         a = Signal(9)
-        we = Signal()
+        we = Signal(8) # 8 select lines
         q = Signal(64) # output
         d = Signal(64) # input