check result first then CR second

diff --git a/src/soc/fu/div/test/test_pipe_caller.py b/src/soc/fu/div/test/test_pipe_caller.py
index 2fe7ac085ba7b9ffe77f2501b9c14492222d866d..9041aa6dbe1d75a0d352e780060d536724466b7d 100644 (file)
--- a/src/soc/fu/div/test/test_pipe_caller.py
+++ b/src/soc/fu/div/test/test_pipe_caller.py
@@ -220,9 +220,9 @@ class TestRunner(FHDLTestCase):
         yield from ALUHelpers.get_sim_xer_ov(sim_o, sim, dec2)
         yield from ALUHelpers.get_sim_xer_so(sim_o, sim, dec2)
 
+        ALUHelpers.check_int_o(self, res, sim_o, code)
         ALUHelpers.check_cr_a(self, res, sim_o, "CR%d %s" % (cridx, code))
         ALUHelpers.check_xer_ov(self, res, sim_o, code)
-        ALUHelpers.check_int_o(self, res, sim_o, code)
         ALUHelpers.check_xer_so(self, res, sim_o, code)