from string import digits
-## dictionary of properties of signals that are supported.
-dictionary={
- "uart_rx" :"input",
- "uart_tx" :"output",
- "spi_sclk" :"output",
- "spi_mosi" :"output",
- "spi_ss" :"output",
- "spi_miso" :"input",
- "twi_sda" :"inout",
- "twi_scl" :"inout"
+# dictionary of properties of signals that are supported.
+dictionary = {
+ "uart_rx" : "input",
+ "uart_tx" : "output",
+ "spi_sclk" : "output",
+ "spi_mosi" : "output",
+ "spi_ss" : "output",
+ "spi_miso" : "input",
+ "twi_sda" : "inout",
+ "twi_scl" : "inout"
}
-
-########### common bsv templates ############
-assign_cell='''cell{0}_out=wrmux{0}=={1}?'''
-# first argument is the io-cell number being assigned.
-# second argument is the mux value.
+
+# ============== common bsv templates ============ #
+assign_cell = '''cell{0}_out=wrmux{0}=={1}?'''
+# first argument is the io-cell number being assigned.
+# second argument is the mux value.
# Third argument is the signal from the pinmap file
-input_wire='''
- rule assign_{2}_on_cell{0}(wrmux{0}=={1});
- {2}<=cell{0}_in;
- endrule
+input_wire = '''
+ rule assign_{2}_on_cell{0}(wrmux{0}=={1});
+ {2}<=cell{0}_in;
+ endrule
'''
-#########################################
-pinmux=''' '''
-pinmap_file=open("./pinmap.txt","r")
-dedicated=False
-for lineno,line in enumerate(pinmap_file):
- line1=line.split()
- if("muxed" in line):
- dedicated=False
- elif("dedicated" in line):
- dedicated=True
- ############################## Logic for muxed pins ##############################
- if(len(line1)>1 and not(dedicated)):
- if(lineno>N_IO):
- print("ERROR: Parameter N_IO("+str(N_IO)+") is less than the pin number in line: "+str(lineno)+" of pinmap.txt")
- exit(1)
- ######## Mux each generic IO cell with the mapping######
- # provided in the pinmap file
- pinmux=pinmux+" cell"+str(line1[0])+"_out="
- i=0
- while(i<len(line1)-1):
- pinmux=pinmux+"wrmux"+str(line1[0])+"=="+str(i)+"?"+line1[i+1]+"_io:"
- if(i+2==len(line1)-1):
- pinmux=pinmux+line1[i+2]+"_io"
- i=i+2
- else:
- i=i+1
- pinmux=pinmux+";\n"
- ########################################################
-
- ###### check each cell if "peripheral input/inout" then assign its wire ########
- ## Here we check the direction of each signal in the dictionary.
- ## We choose to keep the dictionary within the code and not user-input
- ## since the interfaces are always standard and cannot change from user-to-user.
- ## Plus this also reduces human-error as well :)
- for i in range(0,len(line1)-1):
- digits = str.maketrans(dict.fromkeys('0123456789'))
- temp=line1[i+1].translate(digits)
- x=dictionary.get(temp);
- if(x==None):
- print("Error: The signal : "+str(line1[i+1])+" in lineno: "+str(lineno)+"of pinmap.txt is not present in the current dictionary.\nSoln: Either update the dictionary or fix typo.")
- exit(1)
- if(x=="input"):
- pinmux=pinmux+input_wire.format(line1[0],i,"wr"+line1[i+1])+"\n"
- elif(x=="inout"):
- pinmux=pinmux+input_wire.format(line1[0],i,"wr"+line1[i+1]+"_in")+"\n"
- ################################################################################
+# ============================================================
+pinmux = ''' '''
+pinmap_file = open("./pinmap.txt", "r")
+dedicated = False
+for lineno, line in enumerate(pinmap_file):
+ line1 = line.split()
+ if("muxed" in line):
+ dedicated = False
+ elif("dedicated" in line):
+ dedicated = True
+ # ==== Logic for muxed pins ==== #
+ if(len(line1) > 1 and not(dedicated)):
+ if(lineno > N_IO):
+ print(
+ "ERROR: Parameter N_IO(" +
+ str(N_IO) +
+ ") is less than the pin number in line: " +
+ str(lineno) +
+ " of pinmap.txt")
+ exit(1)
+ # ==== Mux each generic IO cell with the mapping ===== #
+ # provided in the pinmap file
+ pinmux = pinmux + " cell" + str(line1[0]) + "_out="
+ i = 0
+ while(i < len(line1) - 1):
+ pinmux = pinmux + "wrmux" + \
+ str(line1[0]) + "==" + str(i) + "?" + line1[i + 1] + "_io:"
+ if(i + 2 == len(line1) - 1):
+ pinmux = pinmux + line1[i + 2] + "_io"
+ i = i + 2
+ else:
+ i = i + 1
+ pinmux = pinmux + ";\n"
+ # ======================================================== #
- ############################## Logic for dedicated pins ##############################
- elif(len(line1)>1 and dedicated):
- pinmux=pinmux+" cell"+str(line1[0])+"_out="+line1[1]+"_io;\n"
-###########################################
+ # check each cell if "peripheral input/inout" then assign its wire
+ # Here we check the direction of each signal in the dictionary.
+ # We choose to keep the dictionary within the code and not user-input
+ # since the interfaces are always standard and cannot change from
+ # user-to-user. Plus this also reduces human-error as well :)
+ for i in range(0, len(line1) - 1):
+ digits = str.maketrans(dict.fromkeys('0123456789'))
+ temp = line1[i + 1].translate(digits)
+ x = dictionary.get(temp)
+ if(x is None):
+ print(
+ "Error: The signal : " +
+ str(line1[i + 1]) +
+ " in lineno: " +
+ str(lineno) + "of pinmap.txt isn't present in the \
+ current dictionary.\nUpdate dictionary or fix-typo.")
+ exit(1)
+ if(x == "input"):
+ pinmux = pinmux + \
+ input_wire.format(line1[0], i, "wr" + line1[i + 1]) + "\n"
+ elif(x == "inout"):
+ pinmux = pinmux + \
+ input_wire.format(line1[0], i, "wr" + line1[i + 1] +
+ "_in") + "\n"
+ # ============================================================ #
+ # ================== Logic for dedicated pins ========= #
+ elif(len(line1) > 1 and dedicated):
+ pinmux = pinmux + " cell" + \
+ str(line1[0]) + "_out=" + line1[1] + "_io;\n"
+ # ======================================================= #
+# =========================================================
from params import *
-#######====== Interface declarations =======#########
-mux_interface='''
- method Action cell{0}_mux(Bit#('''+str(N_MUX)+''') in);'''
+# ========= Interface declarations ================ #
+mux_interface = '''
+ method Action cell{0}_mux(Bit#(''' + str(N_MUX) + ''') in);'''
-io_interface='''
- (*always_ready*) method Bit#(1) io_outputval_{0};
- (*always_ready*) method Bit#(1) io_output_en_{0};
- (*always_ready*) method Bit#(1) io_input_en_{0};
- (*always_ready*) method Bit#(1) io_pullup_en_{0};
- (*always_ready*) method Bit#(1) io_pulldown_en_{0};
- (*always_ready*) method Bit#(1) io_drivestrength_{0};
- (*always_ready*) method Bit#(1) io_pushpull_en_{0};
- (*always_ready*) method Bit#(1) io_opendrain_en_{0};
- (*always_ready,always_enabled,result="io"*) method Action io_inputval_{0}(Bit#(1) in);
+io_interface = '''
+ (*always_ready*) method Bit#(1) io_outputval_{0};
+ (*always_ready*) method Bit#(1) io_output_en_{0};
+ (*always_ready*) method Bit#(1) io_input_en_{0};
+ (*always_ready*) method Bit#(1) io_pullup_en_{0};
+ (*always_ready*) method Bit#(1) io_pulldown_en_{0};
+ (*always_ready*) method Bit#(1) io_drivestrength_{0};
+ (*always_ready*) method Bit#(1) io_pushpull_en_{0};
+ (*always_ready*) method Bit#(1) io_opendrain_en_{0};
+ (*always_ready,always_enabled,result="io"*)
+ method Action io_inputval_{0}(Bit#(1) in);
'''
-#== Peripheral Interface definitions ==#
+# == Peripheral Interface definitions == #
# these are the interface of the peripherals to the pin mux
-# Outputs from the peripherals will be inputs to the pinmux
+# Outputs from the peripherals will be inputs to the pinmux
# module. Hence the change in direction for most pins
-uartinterface_decl='''
- (*always_ready,always_enabled*) method Action tx_{0}(Bit#(1) in);
- (*always_ready,always_enabled*) method Bit#(1) rx_{0};
+uartinterface_decl = '''
+ (*always_ready,always_enabled*) method Action tx_{0}(Bit#(1) in);
+ (*always_ready,always_enabled*) method Bit#(1) rx_{0};
'''
-spiinterface_decl='''
- (*always_ready,always_enabled*) method Action sclk_{0} (Bit#(1) in);
- (*always_ready,always_enabled*) method Action mosi_{0} (Bit#(1) in);
- (*always_ready,always_enabled*) method Action ss_{0} (Bit#(1) in);
- (*always_ready,always_enabled*) method Bit#(1) miso_{0};
+spiinterface_decl = '''
+ (*always_ready,always_enabled*) method Action sclk_{0} (Bit#(1) in);
+ (*always_ready,always_enabled*) method Action mosi_{0} (Bit#(1) in);
+ (*always_ready,always_enabled*) method Action ss_{0} (Bit#(1) in);
+ (*always_ready,always_enabled*) method Bit#(1) miso_{0};
'''
-twiinterface_decl='''
- (*always_ready,always_enabled*) method Action sda{0}_out (Bit#(1) in);
- (*always_ready,always_enabled*) method Action sda{0}_outen (Bit#(1) in);
- (*always_ready,always_enabled*) method Bit#(1) sda{0}_in;
- (*always_ready,always_enabled*) method Action scl{0}_out (Bit#(1) in);
- (*always_ready,always_enabled*) method Action scl{0}_outen (Bit#(1) in);
- (*always_ready,always_enabled*) method Bit#(1) scl{0}_in;
+twiinterface_decl = '''
+ (*always_ready,always_enabled*) method Action sda{0}_out (Bit#(1) in);
+ (*always_ready,always_enabled*) method Action sda{0}_outen (Bit#(1) in);
+ (*always_ready,always_enabled*) method Bit#(1) sda{0}_in;
+ (*always_ready,always_enabled*) method Action scl{0}_out (Bit#(1) in);
+ (*always_ready,always_enabled*) method Action scl{0}_outen (Bit#(1) in);
+ (*always_ready,always_enabled*) method Bit#(1) scl{0}_in;
'''
-#=======================================#
-
-
+# ======================================= #
from params import *
-#=== templates for interface definitions ======#
-mux_interface_def='''
- method Action cell{0}_mux (Bit#('''+str(N_MUX)+''') in );
- wrmux{0}<=in;
- endmethod
+# === templates for interface definitions ====== #
+mux_interface_def = '''
+ method Action cell{0}_mux (Bit#(''' + str(N_MUX) + ''') in );
+ wrmux{0}<=in;
+ endmethod
'''
-io_interface_def='''
- method io_outputval_{0}=cell{0}_out.outputval;
- method io_output_en_{0}=cell{0}_out.output_en;
- method io_input_en_{0}=cell{0}_out.input_en;
- method io_pullup_en_{0}=cell{0}_out.pullup_en;
- method io_pulldown_en_{0}=cell{0}_out.pulldown_en;
- method io_drivestrength_{0}=cell{0}_out.drivestrength;
- method io_pushpull_en_{0}=cell{0}_out.pushpull_en;
- method io_opendrain_en_{0}=cell{0}_out.opendrain_en;
- method Action io_inputval_{0}(Bit#(1) in);
- cell{0}_in<=in;
- endmethod
+io_interface_def = '''
+ method io_outputval_{0}=cell{0}_out.outputval;
+ method io_output_en_{0}=cell{0}_out.output_en;
+ method io_input_en_{0}=cell{0}_out.input_en;
+ method io_pullup_en_{0}=cell{0}_out.pullup_en;
+ method io_pulldown_en_{0}=cell{0}_out.pulldown_en;
+ method io_drivestrength_{0}=cell{0}_out.drivestrength;
+ method io_pushpull_en_{0}=cell{0}_out.pushpull_en;
+ method io_opendrain_en_{0}=cell{0}_out.opendrain_en;
+ method Action io_inputval_{0}(Bit#(1) in);
+ cell{0}_in<=in;
+ endmethod
'''
-uartinterface_def='''
- method rx_{0}=wruart{0}_rx;
- method Action tx_{0}(Bit#(1) in);
- wruart{0}_tx<=in;
- endmethod
+uartinterface_def = '''
+ method rx_{0}=wruart{0}_rx;
+ method Action tx_{0}(Bit#(1) in);
+ wruart{0}_tx<=in;
+ endmethod
'''
-spiinterface_def='''
- method Action sclk_{0} (Bit#(1) in);
- wrspi{0}_sclk<=in;
- endmethod
- method Action mosi_{0} (Bit#(1) in);
- wrspi{0}_mosi<=in;
- endmethod
- method Action ss_{0} (Bit#(1) in);
- wrspi{0}_ss<=in;
- endmethod
- method Bit#(1) miso_{0}=wrspi{0}_miso;
+spiinterface_def = '''
+ method Action sclk_{0} (Bit#(1) in);
+ wrspi{0}_sclk<=in;
+ endmethod
+ method Action mosi_{0} (Bit#(1) in);
+ wrspi{0}_mosi<=in;
+ endmethod
+ method Action ss_{0} (Bit#(1) in);
+ wrspi{0}_ss<=in;
+ endmethod
+ method Bit#(1) miso_{0}=wrspi{0}_miso;
'''
-twiinterface_def='''
+twiinterface_def = '''
- method Action sda{0}_out (Bit#(1) in);
- wrtwi{0}_sda_out<=in;
- endmethod
- method Action sda{0}_outen (Bit#(1) in);
- wrtwi{0}_sda_outen<=in;
- endmethod
- method sda{0}_in=wrtwi{0}_sda_in;
-
- method Action scl{0}_out (Bit#(1) in);
- wrtwi{0}_scl_out<=in;
- endmethod
- method Action scl{0}_outen (Bit#(1) in);
- wrtwi{0}_scl_outen<=in;
- endmethod
- method scl{0}_in=wrtwi{0}_scl_in;
-
-'''
-#==============================================#
+ method Action sda{0}_out (Bit#(1) in);
+ wrtwi{0}_sda_out<=in;
+ endmethod
+ method Action sda{0}_outen (Bit#(1) in);
+ wrtwi{0}_sda_outen<=in;
+ endmethod
+ method sda{0}_in=wrtwi{0}_sda_in;
+ method Action scl{0}_out (Bit#(1) in);
+ wrtwi{0}_scl_out<=in;
+ endmethod
+ method Action scl{0}_outen (Bit#(1) in);
+ wrtwi{0}_scl_outen<=in;
+ endmethod
+ method scl{0}_in=wrtwi{0}_scl_in;
+'''
+# ============================================== #
-#== Parameters ==#
-N_MUX=1 # number of selection lines for the mux per io
-N_IO=6
-N_UART=2
-N_SPI=1
-N_TWI=1
-#================#
-
-
+# == Parameters == #
+N_MUX = 1 # number of selection lines for the mux per io
+N_IO = 6
+N_UART = 2
+N_SPI = 1
+N_TWI = 1
+# ================ #
-#############################======= Steps to add peripherals =======#######################
-# Step-1: create interface declaration for the peripheral to be added. Remember these are
-# interfaces defined for the pinmux and hence will be opposite to those defined
-# at the peripheral. For eg. the output TX from the UART will be input (method Action)
-# for the pinmux. These changes will have to be done in interface_decl.py
-# Step-2 define the wires that will be required to transfer data from the peripheral interface
-# to the IO cell and vice-versa. Create a mkDWire for each input/output between the
-# the peripheral and the pinmux. Also create an implicit wire of GenericIOType
-# for each cell that can be connected to a each bit from the peripheral.
-# These changes will have to be done in wire_def.py
-# Step-3: create the definitions for each of the methods defined above.
-# These changes will have to be done in interface_decl.py
-############################################################################################
+# ================================== Steps to add peripherals ============
+# Step-1: create interface declaration for the peripheral to be added.
+# Remember these are interfaces defined for the pinmux and hence
+# will be opposite to those defined at the peripheral.
+# For eg. the output TX from the UART will be input (method Action)
+# for the pinmux.
+# These changes will have to be done in interface_decl.py
+# Step-2 define the wires that will be required to transfer data from the
+# peripheral interface to the IO cell and vice-versa. Create a
+# mkDWire for each input/output between the peripheral and the
+# pinmux. Also create an implicit wire of GenericIOType for each cell
+# that can be connected to a each bit from the peripheral.
+# These changes will have to be done in wire_def.py
+# Step-3: create the definitions for each of the methods defined above.
+# These changes will have to be done in interface_decl.py
+# ========================================================================
# default module imports
import os
# project module imports
from interface_decl import *
-from interface_def import *
-from params import *
+from interface_def import *
+from params import *
from wire_def import *
from actual_pinmux import *
if not os.path.exists("bsv_src"):
os.makedirs("bsv_src")
-bsv_file=open("./bsv_src/pinmux.bsv","w")
-header='''
+bsv_file = open("./bsv_src/pinmux.bsv", "w")
+header = '''
/*
- This BSV file has been generated by the PinMux tool available at: <website>.
- Authors: Neel Gala, Luke
- Date of generation: '''+time.strftime("%c")+'''
+ This BSV file has been generated by the PinMux tool available at: <website>.
+ Authors: Neel Gala, Luke
+ Date of generation: ''' + time.strftime("%c") + '''
*/
package pinmux;
- typedef struct{
- Bit#(1) outputval; // output from core to pad bit7
- Bit#(1) output_en; // output enable from core to pad bit6
- Bit#(1) input_en; // input enable from core to io_cell bit5
- Bit#(1) pullup_en; // pullup enable from core to io_cell bit4
- Bit#(1) pulldown_en; // pulldown enable from core to io_cell bit3
- Bit#(1) drivestrength; // drivestrength from core to io_cell bit2
- Bit#(1) pushpull_en; // pushpull enable from core to io_cell bit1
- Bit#(1) opendrain_en; // opendrain enable form core to io_cell bit0
- } GenericIOType deriving(Eq,Bits,FShow);
-
- interface Ifc_pinmux;
+ typedef struct{
+ Bit#(1) outputval; // output from core to pad bit7
+ Bit#(1) output_en; // output enable from core to pad bit6
+ Bit#(1) input_en; // input enable from core to io_cell bit5
+ Bit#(1) pullup_en; // pullup enable from core to io_cell bit4
+ Bit#(1) pulldown_en; // pulldown enable from core to io_cell bit3
+ Bit#(1) drivestrength; // drivestrength from core to io_cell bit2
+ Bit#(1) pushpull_en; // pushpull enable from core to io_cell bit1
+ Bit#(1) opendrain_en; // opendrain enable form core to io_cell bit0
+ } GenericIOType deriving(Eq,Bits,FShow);
+
+ interface Ifc_pinmux;
'''
-footer='''
- endmodule
+footer = '''
+ endmodule
endpackage
'''
-###############################################
-###=== populating the file with the code ===###
-###############################################
+# ============================================#
+# ==== populating the file with the code =====#
+# ============================================#
# package and interface declaration followed by the generic io_cell definition
bsv_file.write(header)
-bsv_file.write('''
-
- // declare the method which will capture the user pin-mux selection values.
- // The width of the input is dependent on the number of muxes happening per IO.
- // For now we have a generalized width where each IO will have the same number
- // of muxes.''')
-
-for i in range(0,N_IO):
- bsv_file.write(mux_interface.format(i))
-
-bsv_file.write('''
-
- // declare the interface to the IO cells.
- // Each IO cell will have 8 input field (output from pin mux
- // and on output field (input to pinmux)''' );
-for i in range(0,N_IO):
- bsv_file.write('''\n // interface for IO CEll-{0}''')
- bsv_file.write(io_interface.format(i))
-################################################################
-
-#== create method definitions for all peripheral interfaces ==#
-for i in range(0,N_UART):
- bsv_file.write('''
- // interface declaration between UART-{0} and pinmux'''.format(i))
- bsv_file.write(uartinterface_decl.format(i));
+bsv_file.write('''
-for i in range(0,N_SPI):
- bsv_file.write('''
- // interface declaration between SPI-{0} and pinmux'''.format(i))
- bsv_file.write(spiinterface_decl.format(i));
+ // declare the method which will capture the user pin-mux
+ // selection values.The width of the input is dependent on the number
+ // of muxes happening per IO. For now we have a generalized width
+ // where each IO will have the same number of muxes.''')
-for i in range(0,N_TWI):
- bsv_file.write('''
- // interface declaration between TWI-{0} and pinmux'''.format(i))
- bsv_file.write(twiinterface_decl.format(i));
-################################################################
+for i in range(0, N_IO):
+ bsv_file.write(mux_interface.format(i))
-####=== finish interface definition and start module definition===####
bsv_file.write('''
- endinterface
- (*synthesize*)
- module mkpinmux(Ifc_pinmux);
-''')
-######################################################################
-#######################== create wire and registers ===###############
+ // declare the interface to the IO cells.
+ // Each IO cell will have 8 input field (output from pin mux
+ // and on output field (input to pinmux)''')
+for i in range(0, N_IO):
+ bsv_file.write('''\n // interface for IO CEll-{0}''')
+ bsv_file.write(io_interface.format(i))
+# ==============================================================
+
+# == create method definitions for all peripheral interfaces ==#
+for i in range(0, N_UART):
+ bsv_file.write('''
+ // interface declaration between UART-{0} and pinmux'''.format(i))
+ bsv_file.write(uartinterface_decl.format(i))
+
+for i in range(0, N_SPI):
+ bsv_file.write('''
+ // interface declaration between SPI-{0} and pinmux'''.format(i))
+ bsv_file.write(spiinterface_decl.format(i))
+
+for i in range(0, N_TWI):
+ bsv_file.write('''
+ // interface declaration between TWI-{0} and pinmux'''.format(i))
+ bsv_file.write(twiinterface_decl.format(i))
+# ==============================================================
+
+# ===== finish interface definition and start module definition=======
bsv_file.write('''
- // the followins wires capture the pin-mux selection
- // values for each mux assigned to a CELL
+ endinterface
+ (*synthesize*)
+ module mkpinmux(Ifc_pinmux);
''')
-for i in range(0,N_IO):
- bsv_file.write(muxwire.format(i))
+# ====================================================================
-
-bsv_file.write('''\n // following wires capture the values to be sent to the IO Cell''')
-for i in range(0,N_IO):
- bsv_file.write(generic_io.format(i))
-
-for i in range(0,N_UART):
- bsv_file.write('''\n // following wires capture the parameters to the IO CELL if uart-{0} is
- // allotted to it'''.format(i))
- bsv_file.write(uartwires.format(i))
-
-for i in range(0,N_SPI):
- bsv_file.write('''\n // following wires capture the parameters to the IO CELL if spi-{0} is
- // allotted to it'''.format(i))
- bsv_file.write(spiwires.format(i))
-
-for i in range(0,N_TWI):
- bsv_file.write('''\n // following wires capture the parameters to the IO CELL if twi-{0} is
- // allotted to it'''.format(i))
- bsv_file.write(twiwires.format(i))
+# ======================= create wire and registers =================#
+bsv_file.write('''
+ // the followins wires capture the pin-mux selection
+ // values for each mux assigned to a CELL
+''')
+for i in range(0, N_IO):
+ bsv_file.write(muxwire.format(i))
+
+
+bsv_file.write(
+ '''\n // following wires capture the values sent to the IO Cell''')
+for i in range(0, N_IO):
+ bsv_file.write(generic_io.format(i))
+
+for i in range(0, N_UART):
+ bsv_file.write(
+ '''\n // following wires capture signals to IO CELL if uart-{0} is
+ // allotted to it'''.format(i))
+ bsv_file.write(uartwires.format(i))
+
+for i in range(0, N_SPI):
+ bsv_file.write(
+ '''\n // following wires capture signals to IO CELL if spi-{0} is
+ // allotted to it'''.format(i))
+ bsv_file.write(spiwires.format(i))
+
+for i in range(0, N_TWI):
+ bsv_file.write(
+ '''\n // following wires capture signals to IO CELL if twi-{0} is
+ // allotted to it'''.format(i))
+ bsv_file.write(twiwires.format(i))
bsv_file.write("\n")
-######################################################################
-#########################== Actual pinmuxing ==#######################
+# ====================================================================
+# ========================= Actual pinmuxing ========================#
bsv_file.write('''
- /*================= This where the muxing starts for each io-cell=================*/
+ /*====== This where the muxing starts for each io-cell======*/
''')
-bsv_file.write(pinmux);
+bsv_file.write(pinmux)
bsv_file.write('''
- /*================================================================================*/
+ /*============================================================*/
''')
-######################################################################
-################=== interface definitions for each method ===###########
-for i in range(0,N_IO):
- bsv_file.write(mux_interface_def.format(i))
-for i in range(0,N_IO):
- bsv_file.write(io_interface_def.format(i))
-for i in range(0,N_UART):
- bsv_file.write(uartinterface_def.format(i))
-for i in range(0,N_SPI):
- bsv_file.write(spiinterface_def.format(i))
-for i in range(0,N_TWI):
- bsv_file.write(twiinterface_def.format(i))
+# ====================================================================
+# ================= interface definitions for each method =============#
+for i in range(0, N_IO):
+ bsv_file.write(mux_interface_def.format(i))
+for i in range(0, N_IO):
+ bsv_file.write(io_interface_def.format(i))
+for i in range(0, N_UART):
+ bsv_file.write(uartinterface_def.format(i))
+for i in range(0, N_SPI):
+ bsv_file.write(spiinterface_def.format(i))
+for i in range(0, N_TWI):
+ bsv_file.write(twiinterface_def.format(i))
bsv_file.write(footer)
print("BSV file successfully generated: bsv_src/pinmux.bsv")
-########################################################################
+# ======================================================================
from params import *
-#== Intermediate wire definitions ==#
-muxwire='''
- Wire#(Bit#('''+str(N_MUX)+''')) wrmux{0} <-mkDWire(0);'''
-generic_io='''
- GenericIOType cell{0}_out=unpack(0);
- Wire#(Bit#(1)) cell{0}_in <-mkDWire(0);
+# == Intermediate wire definitions ==#
+muxwire = '''
+ Wire#(Bit#(''' + str(N_MUX) + ''')) wrmux{0} <-mkDWire(0);'''
+generic_io = '''
+ GenericIOType cell{0}_out=unpack(0);
+ Wire#(Bit#(1)) cell{0}_in <-mkDWire(0);
'''
-uartwires='''
- Wire#(Bit#(1)) wruart{0}_rx <-mkDWire(0);
- Wire#(Bit#(1)) wruart{0}_tx <-mkDWire(0);
- GenericIOType uart{0}_rx_io=GenericIOType{{outputval:0, output_en:0, input_en:1,
- pullup_en:0, pulldown_en:0, pushpull_en:0,
- drivestrength:0, opendrain_en:0}};
- GenericIOType uart{0}_tx_io=GenericIOType{{outputval:wruart{0}_tx, output_en:1, input_en:0,
- pullup_en:0, pulldown_en:0, pushpull_en:0,
- drivestrength:0, opendrain_en:0}};
+uartwires = '''
+ Wire#(Bit#(1)) wruart{0}_rx <-mkDWire(0);
+ Wire#(Bit#(1)) wruart{0}_tx <-mkDWire(0);
+ GenericIOType uart{0}_rx_io=GenericIOType{{outputval:0, output_en:0,
+ input_en:1, pullup_en:0, pulldown_en:0, pushpull_en:0,
+ drivestrength:0, opendrain_en:0}};
+ GenericIOType uart{0}_tx_io=GenericIOType{{outputval:wruart{0}_tx,
+ output_en:1, input_en:0, pullup_en:0, pulldown_en:0,
+ pushpull_en:0, drivestrength:0, opendrain_en:0}};
'''
-spiwires='''
- Wire#(Bit#(1)) wrspi{0}_sclk <-mkDWire(0);
- Wire#(Bit#(1)) wrspi{0}_mosi <-mkDWire(0);
- Wire#(Bit#(1)) wrspi{0}_ss <-mkDWire(0);
- Wire#(Bit#(1)) wrspi{0}_miso <-mkDWire(0);
- GenericIOType spi{0}_sclk_io = GenericIOType{{outputval:wrspi{0}_sclk, output_en:1, input_en:0,
- pullup_en:0, pulldown_en:0, pushpull_en:0,
- drivestrength:0, opendrain_en:0}};
- GenericIOType spi{0}_mosi_io = GenericIOType{{outputval:wrspi{0}_mosi, output_en:1, input_en:0,
- pullup_en:0, pulldown_en:0, pushpull_en:0,
- drivestrength:0, opendrain_en:0}};
- GenericIOType spi{0}_ss_io = GenericIOType{{outputval:wrspi{0}_ss, output_en:1, input_en:0,
- pullup_en:0, pulldown_en:0, pushpull_en:0,
- drivestrength:0, opendrain_en:0}};
- GenericIOType spi{0}_miso_io = GenericIOType{{outputval:0, output_en:0, input_en:1,
- pullup_en:0, pulldown_en:0, pushpull_en:0,
- drivestrength:0, opendrain_en:0}};
-
+spiwires = '''
+ Wire#(Bit#(1)) wrspi{0}_sclk <-mkDWire(0);
+ Wire#(Bit#(1)) wrspi{0}_mosi <-mkDWire(0);
+ Wire#(Bit#(1)) wrspi{0}_ss <-mkDWire(0);
+ Wire#(Bit#(1)) wrspi{0}_miso <-mkDWire(0);
+ GenericIOType spi{0}_sclk_io = GenericIOType{{outputval:wrspi{0}_sclk,
+ output_en:1, input_en:0, pullup_en:0, pulldown_en:0,
+ pushpull_en:0, drivestrength:0, opendrain_en:0}};
+ GenericIOType spi{0}_mosi_io = GenericIOType{{outputval:wrspi{0}_mosi,
+ output_en:1, input_en:0, pullup_en:0, pulldown_en:0,
+ pushpull_en:0, drivestrength:0, opendrain_en:0}};
+ GenericIOType spi{0}_ss_io = GenericIOType{{outputval:wrspi{0}_ss,
+ output_en:1, input_en:0, pullup_en:0, pulldown_en:0,
+ pushpull_en:0, drivestrength:0, opendrain_en:0}};
+ GenericIOType spi{0}_miso_io = GenericIOType{{outputval:0, output_en:0,
+ input_en:1, pullup_en:0, pulldown_en:0, pushpull_en:0,
+ drivestrength:0, opendrain_en:0}};
+
'''
-twiwires='''
- Wire#(Bit#(1)) wrtwi{0}_sda_out<-mkDWire(0);
- Wire#(Bit#(1)) wrtwi{0}_sda_outen<-mkDWire(0);
- Wire#(Bit#(1)) wrtwi{0}_sda_in<-mkDWire(0);
- Wire#(Bit#(1)) wrtwi{0}_scl_out<-mkDWire(0);
- Wire#(Bit#(1)) wrtwi{0}_scl_outen<-mkDWire(0);
- Wire#(Bit#(1)) wrtwi{0}_scl_in<-mkDWire(0);
- GenericIOType twi{0}_sda_io = GenericIOType{{outputval:wrtwi{0}_sda_out, output_en:wrtwi{0}_sda_outen, input_en:~wrtwi{0}_sda_outen,
- pullup_en:0, pulldown_en:0, pushpull_en:0,
- drivestrength:0, opendrain_en:0}};
- GenericIOType twi{0}_scl_io = GenericIOType{{outputval:wrtwi{0}_scl_out, output_en:wrtwi{0}_scl_outen, input_en:~wrtwi{0}_scl_outen,
- pullup_en:0, pulldown_en:0, pushpull_en:0,
- drivestrength:0, opendrain_en:0}};
+twiwires = '''
+ Wire#(Bit#(1)) wrtwi{0}_sda_out<-mkDWire(0);
+ Wire#(Bit#(1)) wrtwi{0}_sda_outen<-mkDWire(0);
+ Wire#(Bit#(1)) wrtwi{0}_sda_in<-mkDWire(0);
+ Wire#(Bit#(1)) wrtwi{0}_scl_out<-mkDWire(0);
+ Wire#(Bit#(1)) wrtwi{0}_scl_outen<-mkDWire(0);
+ Wire#(Bit#(1)) wrtwi{0}_scl_in<-mkDWire(0);
+ GenericIOType twi{0}_sda_io = GenericIOType{{outputval:wrtwi{0}_sda_out,
+ output_en:wrtwi{0}_sda_outen, input_en:~wrtwi{0}_sda_outen,
+ pullup_en:0, pulldown_en:0, pushpull_en:0, drivestrength:0,
+ opendrain_en:0}};
+ GenericIOType twi{0}_scl_io = GenericIOType{{outputval:wrtwi{0}_scl_out,
+ output_en:wrtwi{0}_scl_outen, input_en:~wrtwi{0}_scl_outen,
+ pullup_en:0, pulldown_en:0, pushpull_en:0, drivestrength:0,
+ opendrain_en:0}};
'''
-#===================================#
-
+# =================================== #