clear instruction fault on idle/valid in Loadstore1

diff --git a/src/soc/fu/ldst/loadstore.py b/src/soc/fu/ldst/loadstore.py
index 080d3320523914ac000cab1fb7014c1261bb3f16..5ea8969daf9235ee714ca01ad9ecab176c71c36d 100644 (file)
--- a/src/soc/fu/ldst/loadstore.py
+++ b/src/soc/fu/ldst/loadstore.py
@@ -233,6 +233,8 @@ class LoadStore1(PortInterfaceBase):
                         sync += self.r_instr_fault.eq(1)
                         comb += maddr.eq(self.maddr)
                         sync += self.state.eq(State.MMU_LOOKUP)
+                    with m.Else():
+                        sync += self.r_instr_fault.eq(0)
                 with m.Else():
                     sync += ldst_r.eq(0)