ac: add has_load_ctx_reg_pkt to ac_gpu_info

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c
index 50e92a405e336a38f2a626af646b3f1bb123ec08..ec7b74aaaf4a7808bc21ad4e969cc2c7d9ec1a0a 100644 (file)
--- a/src/amd/common/ac_gpu_info.c
+++ b/src/amd/common/ac_gpu_info.c
@@ -457,6 +457,11 @@ bool ac_query_gpu_info(int fd, void *dev_p,
        info->has_rbplus = info->family == CHIP_STONEY ||
                           info->chip_class >= GFX9;
 
+       /* TODO: Figure out how to use LOAD_CONTEXT_REG on GFX6-GFX7. */
+       info->has_load_ctx_reg_pkt = info->chip_class >= GFX9 ||
+                                    (info->chip_class >= GFX8 &&
+                                     info->me_fw_feature >= 41);
+
        /* Get the number of good compute units. */
        info->num_good_compute_units = 0;
        for (i = 0; i < info->max_se; i++)

diff --git a/src/amd/common/ac_gpu_info.h b/src/amd/common/ac_gpu_info.h
index 173cc82084ab6a0ff63c0f8b5a5606dbb86556bc..10a3205f44d9b4acdfd374ffa2e1d625babe71ca 100644 (file)
--- a/src/amd/common/ac_gpu_info.h
+++ b/src/amd/common/ac_gpu_info.h
@@ -62,6 +62,7 @@ struct radeon_info {
        bool                        has_distributed_tess;
        bool                        has_dcc_constant_encode;
        bool                        has_rbplus; /* if RB+ registers exist */
+       bool                        has_load_ctx_reg_pkt;
 
        /* There are 2 display DCC codepaths, because display expects unaligned DCC. */
        /* Disable RB and pipe alignment to skip the retile blit. (1 RB chips only) */

diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index ac9ec2e9b0d7df9f45f219b2079127548e3e910b..0529a38857e4c6df501d7138c034c6654644c2fb 100644 (file)
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -1732,7 +1732,7 @@ radv_load_ds_clear_metadata(struct radv_cmd_buffer *cmd_buffer,
 
        uint32_t reg = R_028028_DB_STENCIL_CLEAR + 4 * reg_offset;
 
-       if (cmd_buffer->device->physical_device->has_load_ctx_reg_pkt) {
+       if (cmd_buffer->device->physical_device->rad_info.has_load_ctx_reg_pkt) {
                radeon_emit(cs, PKT3(PKT3_LOAD_CONTEXT_REG, 3, 0));
                radeon_emit(cs, va);
                radeon_emit(cs, va >> 32);
@@ -1916,7 +1916,7 @@ radv_load_color_clear_metadata(struct radv_cmd_buffer *cmd_buffer,
 
        uint32_t reg = R_028C8C_CB_COLOR0_CLEAR_WORD0 + cb_idx * 0x3c;
 
-       if (cmd_buffer->device->physical_device->has_load_ctx_reg_pkt) {
+       if (cmd_buffer->device->physical_device->rad_info.has_load_ctx_reg_pkt) {
                radeon_emit(cs, PKT3(PKT3_LOAD_CONTEXT_REG, 3, cmd_buffer->state.predicating));
                radeon_emit(cs, va);
                radeon_emit(cs, va >> 32);

diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index 3726ad0ec787885b039632ecae210cbaa1d6fdb1..e49fbe36270c6b1652b6161a266d0e92a232c606 100644 (file)
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -380,11 +380,6 @@ radv_physical_device_init(struct radv_physical_device *device,
        device->dcc_msaa_allowed =
                (device->instance->perftest_flags & RADV_PERFTEST_DCC_MSAA);
 
-       /* TODO: Figure out how to use LOAD_CONTEXT_REG on GFX6-GFX7. */
-       device->has_load_ctx_reg_pkt = device->rad_info.chip_class >= GFX9 ||
-                                      (device->rad_info.chip_class >= GFX8 &&
-                                       device->rad_info.me_fw_feature >= 41);
-
        device->use_shader_ballot = device->rad_info.chip_class >= GFX8 &&
                                    device->instance->perftest_flags & RADV_PERFTEST_SHADER_BALLOT;
 

diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h
index c507945e9eb3bda43bd35e022291028fb4c9f3dc..f252270b207d59d6bbd9047cd75dfd001a7fe662 100644 (file)
--- a/src/amd/vulkan/radv_private.h
+++ b/src/amd/vulkan/radv_private.h
@@ -291,9 +291,6 @@ struct radv_physical_device {
        /* Whether DCC should be enabled for MSAA textures. */
        bool dcc_msaa_allowed;
 
-       /* Whether LOAD_CONTEXT_REG packets are supported. */
-       bool has_load_ctx_reg_pkt;
-
        /* Whether to enable the AMD_shader_ballot extension */
        bool use_shader_ballot;