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   - VSX is SIMD and is considered harmful
   - https://www.sigarch.org/simd-instructions-considered-harmful/
 * Developed in python HDL called "nmigen"
-  - OO programming techniques can be deployed
-  - Impossible to do in VHDL or Verilog
+  - OO programming techniques can be used (not possible in VHDL/Verilog)
   - yosys converts nmigen to verilog for standard tools.
 
 ## What is being developed? (Roadmap)