more code-shuffle

diff --git a/src/ieee754/add/concurrentunit.py b/src/ieee754/add/concurrentunit.py
index 9419d528b163ceba4843c63a523db54e90475224..82b81ff5d315e5bdb586a560f4eaa61420aa923f 100644 (file)
--- a/src/ieee754/add/concurrentunit.py
+++ b/src/ieee754/add/concurrentunit.py
@@ -10,13 +10,6 @@ from nmutil.singlepipe import PassThroughStage
 from nmutil.multipipe import CombMuxOutPipe
 from nmutil.multipipe import PriorityCombMuxInPipe
 
-from ieee754.fpcommon.getop import FPADDBaseData
-from ieee754.fpcommon.denorm import FPSCData
-from ieee754.fpcommon.pack import FPPackData
-from ieee754.fpcommon.normtopack import FPNormToPack
-from ieee754.fpadd.specialcases import FPAddSpecialCasesDeNorm
-from ieee754.fpadd.addstages import FPAddAlignSingleAdd
-
 
 def num_bits(n):
     return int(log(n) / log(2))

diff --git a/src/ieee754/add/dual_add_experiment.py b/src/ieee754/add/dual_add_experiment.py
index 7ec479f5affe95dfb5b4e6bd650b9dec248246ed..8c663ef1bd2c5551e95e1a0aeee906d8e2db0207 100644 (file)
--- a/src/ieee754/add/dual_add_experiment.py
+++ b/src/ieee754/add/dual_add_experiment.py
@@ -2,7 +2,7 @@ from nmigen import *
 from nmigen.cli import main
 
 from nmigen_add_experiment import FPADD
-from fpbase import FPOp
+from ieee754.fpcommon.fpbase import FPOp
 
 
 class Adder:

diff --git a/src/ieee754/add/fadd_state.py b/src/ieee754/add/fadd_state.py
index be4f7d579566fc76866db3e924398182753b7c65..2c0884218b2a4ea970c7434a9ae2228e1142e68d 100644 (file)
--- a/src/ieee754/add/fadd_state.py
+++ b/src/ieee754/add/fadd_state.py
@@ -5,7 +5,7 @@
 from nmigen import Module, Signal, Cat
 from nmigen.cli import main, verilog
 
-from fpbase import FPNumIn, FPNumOut, FPOp, Overflow, FPBase
+from ieee754.fpcommon.fpbase import FPNumIn, FPNumOut, FPOp, Overflow, FPBase
 
 from nmutil.singlepipe import eq
 

diff --git a/src/ieee754/add/inputgroup.py b/src/ieee754/add/inputgroup.py
index e1b775d42b8c259a7c130d8a9a68e743382b4ffd..9322c8a1598d70b521b586c7ae1eca22e6b74b62 100644 (file)
--- a/src/ieee754/add/inputgroup.py
+++ b/src/ieee754/add/inputgroup.py
@@ -2,7 +2,7 @@ from nmigen import Module, Signal, Cat, Array, Const
 from nmigen.lib.coding import PriorityEncoder
 from math import log
 
-from fpbase import Trigger
+from ieee754.fpcommon.fpbase import Trigger
 
 
 class FPGetSyncOpsMod:

diff --git a/src/ieee754/add/rstation_row.py b/src/ieee754/add/rstation_row.py
index aeb58732383d22a06bb8866e8171f191c11dceac..63eaac2e409a79a6ccab728833af38a9c1f30917 100644 (file)
--- a/src/ieee754/add/rstation_row.py
+++ b/src/ieee754/add/rstation_row.py
@@ -2,8 +2,8 @@ from nmigen import Signal, Cat, Const, Mux, Module
 
 from nmigen.cli import main, verilog
 
-from fpbase import FPNumIn, FPNumOut, FPOp, Overflow, FPBase, FPNumBase
-from fpbase import MultiShiftRMerge
+from ieee754.fpcommon.fpbase import FPNumIn, FPNumOut, FPOp, Overflow, FPBase, FPNumBase
+from ieee754.fpcommon.fpbase import MultiShiftRMerge
 
 class ReservationStationRow:
 

diff --git a/src/ieee754/add/test_fpnum.py b/src/ieee754/add/test_fpnum.py
index 6d9ecd1024d6ab063b0055a9c25eac229a0a4f05..1d018b3f3b0440a89e0f8938ae1f44b2335b8a5d 100644 (file)
--- a/src/ieee754/add/test_fpnum.py
+++ b/src/ieee754/add/test_fpnum.py
@@ -2,7 +2,7 @@ from random import randint
 from nmigen import Module, Signal
 from nmigen.compat.sim import run_simulation
 
-from fpbase import FPNum
+from ieee754.fpcommon.fpbase import FPNum
 
 class FPNumModShiftMulti:
     def __init__(self, width):

diff --git a/src/ieee754/add/test_fsm_experiment.py b/src/ieee754/add/test_fsm_experiment.py
index 1a338f56f85dbac45e0eb15bede5bdf701500f6c..204a7d18c66da080f0afa6dd1d0a2407d12e7ba7 100644 (file)
--- a/src/ieee754/add/test_fsm_experiment.py
+++ b/src/ieee754/add/test_fsm_experiment.py
@@ -7,7 +7,7 @@ from nmigen.cli import main, verilog, rtlil
 from nmigen.compat.sim import run_simulation
 
 
-from fpbase import FPNumIn, FPNumOut, FPOpIn, FPOpOut, FPBase, FPState
+from ieee754.fpcommon.fpbase import FPNumIn, FPNumOut, FPOpIn, FPOpOut, FPBase, FPState
 from nmutil.nmoperator import eq
 from nmutil.singlepipe import SimpleHandshake, ControlBase
 from test_buf_pipe import data_chain2, Test5

diff --git a/src/ieee754/add/test_multishift.py b/src/ieee754/add/test_multishift.py
index 651e5018a35d332a5b2f1809493f9b1e747db139..86483453e4f9eda81d668823d2ed601c7627a511 100644 (file)
--- a/src/ieee754/add/test_multishift.py
+++ b/src/ieee754/add/test_multishift.py
@@ -2,7 +2,7 @@ from random import randint
 from nmigen import Module, Signal
 from nmigen.compat.sim import run_simulation
 
-from fpbase import MultiShift, MultiShiftR, MultiShiftRMerge
+from ieee754.fpcommon.fpbase import MultiShift, MultiShiftR, MultiShiftRMerge
 
 class MultiShiftModL:
     def __init__(self, width):

diff --git a/src/ieee754/fpadd/add0.py b/src/ieee754/fpadd/add0.py
index f380d3e5e5c1411759604040e822fdd83777a926..db04506cfb35335176cf4ef6a66dbc945a083ffb 100644 (file)
--- a/src/ieee754/fpadd/add0.py
+++ b/src/ieee754/fpadd/add0.py
@@ -5,8 +5,8 @@
 from nmigen import Module, Signal, Cat, Elaboratable
 from nmigen.cli import main, verilog
 
-from fpbase import FPNumBase
-from fpbase import FPState
+from ieee754.fpcommon.fpbase import FPNumBase
+from ieee754.fpcommon.fpbase import FPState
 from ieee754.fpcommon.denorm import FPSCData
 
 

diff --git a/src/ieee754/fpadd/add1.py b/src/ieee754/fpadd/add1.py
index 1c0ff27a3d7e149ec30c9d121b3c05fe6e130073..1205431272f76e74b21bf4a440924abcac8fb05d 100644 (file)
--- a/src/ieee754/fpadd/add1.py
+++ b/src/ieee754/fpadd/add1.py
@@ -6,7 +6,7 @@ from nmigen import Module, Signal, Elaboratable
 from nmigen.cli import main, verilog
 from math import log
 
-from fpbase import FPState
+from ieee754.fpcommon.fpbase import FPState
 from ieee754.fpcommon.postcalc import FPAddStage1Data
 from .add0 import FPAddStage0Data
 

diff --git a/src/ieee754/fpadd/addstages.py b/src/ieee754/fpadd/addstages.py
index b373f1e3d79347566da70d5d7b149806cc97c50f..b398a2742072246d3f0dc523804c5b09517fc556 100644 (file)
--- a/src/ieee754/fpadd/addstages.py
+++ b/src/ieee754/fpadd/addstages.py
@@ -8,7 +8,7 @@ from nmigen.cli import main, verilog
 from nmutil.singlepipe import (StageChain, SimpleHandshake,
                         PassThroughStage)
 
-from fpbase import FPState
+from ieee754.fpcommon.fpbase import FPState
 from ieee754.fpcommon.denorm import FPSCData
 from ieee754.fpcommon.postcalc import FPAddStage1Data
 from .align import FPAddAlignSingleMod

diff --git a/src/ieee754/fpadd/align.py b/src/ieee754/fpadd/align.py
index c4b4d52fe238b19926fca7d81599c30b3b7e9ce1..381df1e5d7c38b44349c9b93c2cc176ed82d141f 100644 (file)
--- a/src/ieee754/fpadd/align.py
+++ b/src/ieee754/fpadd/align.py
@@ -5,9 +5,9 @@
 from nmigen import Module, Signal
 from nmigen.cli import main, verilog
 
-from fpbase import FPNumOut, FPNumIn, FPNumBase
-from fpbase import MultiShiftRMerge
-from fpbase import FPState
+from ieee754.fpcommon.fpbase import FPNumOut, FPNumIn, FPNumBase
+from ieee754.fpcommon.fpbase import MultiShiftRMerge
+from ieee754.fpcommon.fpbase import FPState
 from ieee754.fpcommon.denorm import FPSCData
 
 

diff --git a/src/ieee754/fpadd/specialcases.py b/src/ieee754/fpadd/specialcases.py
index 978851ef0c99a6aa8829c8c05aadd118cb04bb21..d6dea0ac4950e34a3094571d9f282260e653590b 100644 (file)
--- a/src/ieee754/fpadd/specialcases.py
+++ b/src/ieee754/fpadd/specialcases.py
@@ -6,10 +6,10 @@ from nmigen import Module, Signal, Cat, Const
 from nmigen.cli import main, verilog
 from math import log
 
-from fpbase import FPNumDecode
+from ieee754.fpcommon.fpbase import FPNumDecode
 from nmutil.singlepipe import SimpleHandshake, StageChain
 
-from fpbase import FPState, FPID
+from ieee754.fpcommon.fpbase import FPState, FPID
 from ieee754.fpcommon.getop import FPADDBaseData
 from ieee754.fpcommon.denorm import (FPSCData, FPAddDeNormMod)
 

diff --git a/src/ieee754/fpadd/statemachine.py b/src/ieee754/fpadd/statemachine.py
index 5afe702e707a6ef74f732c7d94f4c8fe8510a56b..bdcec1ba266f38cca97a1931befeca47c77969a4 100644 (file)
--- a/src/ieee754/fpadd/statemachine.py
+++ b/src/ieee754/fpadd/statemachine.py
@@ -6,11 +6,11 @@ from nmigen import Module, Signal, Cat, Mux, Array, Const
 from nmigen.cli import main, verilog
 from math import log
 
-from fpbase import FPOpIn, FPOpOut
-from fpbase import Trigger
+from ieee754.fpcommon.fpbase import FPOpIn, FPOpOut
+from ieee754.fpcommon.fpbase import Trigger
 from nmutil.singlepipe import (StageChain, SimpleHandshake)
 
-from fpbase import FPState, FPID
+from ieee754.fpcommon.fpbase import FPState, FPID
 from ieee754.fpcommon.getop import (FPGetOp, FPADDBaseData, FPGet2Op)
 from ieee754.fpcommon.denorm import (FPSCData, FPAddDeNorm)
 from ieee754.fpcommon.postcalc import FPAddStage1Data

diff --git a/src/ieee754/fpcommon/corrections.py b/src/ieee754/fpcommon/corrections.py
index 68340275a904dc163db609ba905d87ad1b1cd5c6..1405d43db6cb77fdb5dc9dddbec9b91409a79799 100644 (file)
--- a/src/ieee754/fpcommon/corrections.py
+++ b/src/ieee754/fpcommon/corrections.py
@@ -4,7 +4,7 @@
 
 from nmigen import Module, Elaboratable
 from nmigen.cli import main, verilog
-from fpbase import FPState
+from ieee754.fpcommon.fpbase import FPState
 from .roundz import FPRoundData
 
 

diff --git a/src/ieee754/fpcommon/denorm.py b/src/ieee754/fpcommon/denorm.py
index 9fbbc9765d00520a93ffa6ce83f0cbf5bfbc6b75..cf54b0f3f0bf121d5fb4628fe03e285e1230a0e0 100644 (file)
--- a/src/ieee754/fpcommon/denorm.py
+++ b/src/ieee754/fpcommon/denorm.py
@@ -6,8 +6,8 @@ from nmigen import Module, Signal
 from nmigen.cli import main, verilog
 from math import log
 
-from fpbase import FPNumIn, FPNumOut, FPNumBase
-from fpbase import FPState
+from ieee754.fpcommon.fpbase import FPNumIn, FPNumOut, FPNumBase
+from ieee754.fpcommon.fpbase import FPState
 
 
 class FPSCData:

diff --git a/src/ieee754/fpcommon/fpbase.py b/src/ieee754/fpcommon/fpbase.py
index dbd4da271b134cb096cf04667e298ce4d66c3598..ffecd2fdd35460d0d93caa2e0eacf43cbd8e392b 100644 (file)
--- a/src/ieee754/fpcommon/fpbase.py
+++ b/src/ieee754/fpcommon/fpbase.py
@@ -8,7 +8,7 @@ from operator import or_
 from functools import reduce
 
 from nmutil.singlepipe import PrevControl, NextControl
-from pipeline import ObjectProxy
+from nmutil.pipeline import ObjectProxy
 
 
 class MultiShiftR:

diff --git a/src/ieee754/fpcommon/getop.py b/src/ieee754/fpcommon/getop.py
index f772d9041b866a11f5e06b9ab80cca31228a790f..b534fd0a18f92515f279b4cdd779ef275a6b4d0b 100644 (file)
--- a/src/ieee754/fpcommon/getop.py
+++ b/src/ieee754/fpcommon/getop.py
@@ -7,14 +7,14 @@ from nmigen.lib.coding import PriorityEncoder
 from nmigen.cli import main, verilog
 from math import log
 
-from fpbase import FPNumIn, FPNumOut, FPOpIn, Overflow, FPBase, FPNumBase
-from fpbase import MultiShiftRMerge, Trigger
+from ieee754.fpcommon.fpbase import FPNumIn, FPNumOut, FPOpIn, Overflow, FPBase, FPNumBase
+from ieee754.fpcommon.fpbase import MultiShiftRMerge, Trigger
 from nmutil.singlepipe import (ControlBase, StageChain, SimpleHandshake,
                         PassThroughStage, PrevControl)
 from nmutil.multipipe import CombMuxOutPipe
 from nmutil.multipipe import PriorityCombMuxInPipe
 
-from fpbase import FPState
+from ieee754.fpcommon.fpbase import FPState
 from nmutil import nmoperator
 
 

diff --git a/src/ieee754/fpcommon/normtopack.py b/src/ieee754/fpcommon/normtopack.py
index ac97bf1cae5225a8b0f1a84f204c69fd92555696..9cba72550d9366018fcb1cb0e08c9afc91c77162 100644 (file)
--- a/src/ieee754/fpcommon/normtopack.py
+++ b/src/ieee754/fpcommon/normtopack.py
@@ -6,7 +6,7 @@
 
 from nmutil.singlepipe import StageChain, SimpleHandshake
 
-from fpbase import FPState, FPID
+from ieee754.fpcommon.fpbase import FPState, FPID
 from .postcalc import FPAddStage1Data
 from .postnormalise import FPNorm1ModSingle
 from .roundz import FPRoundMod

diff --git a/src/ieee754/fpcommon/pack.py b/src/ieee754/fpcommon/pack.py
index 7407cfb6578f0135c9d2d8d13e7d4c1dad052b68..1042b1b024d0bb0e7bad176d7380ee75e2a99849 100644 (file)
--- a/src/ieee754/fpcommon/pack.py
+++ b/src/ieee754/fpcommon/pack.py
@@ -5,8 +5,8 @@
 from nmigen import Module, Signal, Elaboratable
 from nmigen.cli import main, verilog
 
-from fpbase import FPNumOut
-from fpbase import FPState
+from ieee754.fpcommon.fpbase import FPNumOut
+from ieee754.fpcommon.fpbase import FPState
 from .roundz import FPRoundData
 from nmutil.singlepipe import Object
 

diff --git a/src/ieee754/fpcommon/postcalc.py b/src/ieee754/fpcommon/postcalc.py
index 7111dc8a94f343f83052a86001d0a28b29555ef2..92e8713d1db28105d4db604c2fc0b88594b5aba0 100644 (file)
--- a/src/ieee754/fpcommon/postcalc.py
+++ b/src/ieee754/fpcommon/postcalc.py
@@ -3,7 +3,7 @@
 # 2013-12-12
 
 from nmigen import Signal
-from fpbase import Overflow, FPNumBase
+from ieee754.fpcommon.fpbase import Overflow, FPNumBase
 
 class FPAddStage1Data:
 

diff --git a/src/ieee754/fpcommon/postnormalise.py b/src/ieee754/fpcommon/postnormalise.py
index b072490f0374fab9872c9c846fa9efa161480c07..4812418419d9c01e764b97346d1e76ef8e39b675 100644 (file)
--- a/src/ieee754/fpcommon/postnormalise.py
+++ b/src/ieee754/fpcommon/postnormalise.py
@@ -7,9 +7,9 @@ from nmigen.lib.coding import PriorityEncoder
 from nmigen.cli import main, verilog
 from math import log
 
-from fpbase import Overflow, FPNumBase
-from fpbase import MultiShiftRMerge
-from fpbase import FPState
+from ieee754.fpcommon.fpbase import Overflow, FPNumBase
+from ieee754.fpcommon.fpbase import MultiShiftRMerge
+from ieee754.fpcommon.fpbase import FPState
 from .postcalc import FPAddStage1Data
 
 

diff --git a/src/ieee754/fpcommon/prenormalise.py b/src/ieee754/fpcommon/prenormalise.py
index 0b3a65cbaef9d833d404ac33c87c3b1b6480152c..83d6f6d0d5efad93c53951c33b3cfc98521affa8 100644 (file)
--- a/src/ieee754/fpcommon/prenormalise.py
+++ b/src/ieee754/fpcommon/prenormalise.py
@@ -7,10 +7,10 @@ from nmigen.lib.coding import PriorityEncoder
 from nmigen.cli import main, verilog
 from math import log
 
-from fpbase import Overflow, FPNumBase
-from fpbase import MultiShiftRMerge
+from ieee754.fpcommon.fpbase import Overflow, FPNumBase
+from ieee754.fpcommon.fpbase import MultiShiftRMerge
 
-from fpbase import FPState
+from ieee754.fpcommon.fpbase import FPState
 
 
 class FPNormaliseModSingle:

diff --git a/src/ieee754/fpcommon/putz.py b/src/ieee754/fpcommon/putz.py
index 8173ed859befe0d5adbad6820d98789325e2b6a4..b07ac85a3fd307bb86ddeaccd323c90e6c744c9c 100644 (file)
--- a/src/ieee754/fpcommon/putz.py
+++ b/src/ieee754/fpcommon/putz.py
@@ -4,7 +4,7 @@
 
 from nmigen import Signal
 from nmigen.cli import main, verilog
-from fpbase import FPState
+from ieee754.fpcommon.fpbase import FPState
 
 
 class FPPutZ(FPState):

diff --git a/src/ieee754/fpcommon/roundz.py b/src/ieee754/fpcommon/roundz.py
index 2b456fba47988865b580fde16c06ce02f4120909..130c5ec2ab6603b25d9bc356c80000a1076e6349 100644 (file)
--- a/src/ieee754/fpcommon/roundz.py
+++ b/src/ieee754/fpcommon/roundz.py
@@ -5,8 +5,8 @@
 from nmigen import Module, Signal, Elaboratable
 from nmigen.cli import main, verilog
 
-from fpbase import FPNumBase
-from fpbase import FPState
+from ieee754.fpcommon.fpbase import FPNumBase
+from ieee754.fpcommon.fpbase import FPState
 from .postnormalise import FPNorm1Data
 
 

diff --git a/src/ieee754/fpdiv/nmigen_div_experiment.py b/src/ieee754/fpdiv/nmigen_div_experiment.py
index a19decd5850b2c54c8205b2aeb89d8a8d8ebfb97..7887a5273aa2ad98696f6cc48aa028c1f8c3075e 100644 (file)
--- a/src/ieee754/fpdiv/nmigen_div_experiment.py
+++ b/src/ieee754/fpdiv/nmigen_div_experiment.py
@@ -5,7 +5,7 @@
 from nmigen import Module, Signal, Const, Cat
 from nmigen.cli import main, verilog
 
-from fpbase import FPNumIn, FPNumOut, FPOpIn, FPOpOut, Overflow, FPBase, FPState
+from ieee754.fpcommon.fpbase import FPNumIn, FPNumOut, FPOpIn, FPOpOut, Overflow, FPBase, FPState
 from nmutil.singlepipe import eq
 
 class Div:

diff --git a/src/ieee754/fpmul/fmul.py b/src/ieee754/fpmul/fmul.py
index abe6f613b75ca57882c16098ddce180eae4775cb..3ad9e53975c7d937d831e9f5f45218474ba47bfa 100644 (file)
--- a/src/ieee754/fpmul/fmul.py
+++ b/src/ieee754/fpmul/fmul.py
@@ -1,7 +1,7 @@
 from nmigen import Module, Signal, Cat, Mux, Array, Const
 from nmigen.cli import main, verilog
 
-from fpbase import FPNumIn, FPNumOut, FPOp, Overflow, FPBase, FPState
+from ieee754.fpcommon.fpbase import FPNumIn, FPNumOut, FPOp, Overflow, FPBase, FPState
 from fpcommon.getop import FPGetOp
 from nmutil.singlepipe import eq
 

diff --git a/src/nmutil/multipipe.py b/src/nmutil/multipipe.py
index 04ab6f7e5ecaab7fa6246ecc41e18dcbfad77c85..efc1e005f572301d31648d0349f286be8c0bdbd9 100644 (file)
--- a/src/nmutil/multipipe.py
+++ b/src/nmutil/multipipe.py
@@ -19,7 +19,8 @@ from nmutil.stageapi import _spec
 
 from collections.abc import Sequence
 
-from example_buf_pipe import eq, NextControl, PrevControl, ExampleStage
+from .nmoperator import eq
+from .iocontrol import NextControl, PrevControl
 
 
 class MultiInControlBase(Elaboratable):
@@ -352,6 +353,7 @@ class PriorityCombMuxInPipe(CombMultiInPipeline):
 
 if __name__ == '__main__':
 
+    from nmutil.test.example_buf_pipe import ExampleStage
     dut = PriorityCombMuxInPipe(ExampleStage)
     vl = rtlil.convert(dut, ports=dut.ports())
     with open("test_combpipe.il", "w") as f: