whitespace pep8 cleanup

diff --git a/src/bsv/interface_decl.py b/src/bsv/interface_decl.py
index 5493d16a23d26e7195ffed541071767834bc3725..84eb2f02489082d9017c1b376f732e5ef51394c9 100644 (file)
--- a/src/bsv/interface_decl.py
+++ b/src/bsv/interface_decl.py
@@ -9,6 +9,7 @@ from bsv.wire_def import generic_io  # special case
 from bsv.wire_def import muxwire  # special case
 from ifacebase import InterfacesBase
 
+
 class Pin(object):
     """ pin interface declaration.
         * name is the name of the pin
@@ -312,9 +313,9 @@ class Interfaces(InterfacesBase):
 
 # ========= Interface declarations ================ #
 
-mux_interface = MuxInterface('cell', [{'name': 'mux', 'ready': False,
-                                       'enabled': False,
-                                       'bitspec': '{1}', 'action': True}])
+mux_interface = MuxInterface('cell',
+                             [{'name': 'mux', 'ready': False, 'enabled': False,
+                               'bitspec': '{1}', 'action': True}])
 
 io_interface = IOInterface(
     'io',

diff --git a/src/ifacebase.py b/src/ifacebase.py
index 2fb834cbfff5e3e39f0df2384277b4bbbdc13372..c5487a1c3946562e55902f3714ab5200b7b60cb9 100644 (file)
--- a/src/ifacebase.py
+++ b/src/ifacebase.py
@@ -78,4 +78,3 @@ class InterfacesBase(UserDict):
                         ganged[bus].append(name)
                 spec.append(d)
         return spec, ganged
-

diff --git a/src/myhdl/pinmux_generator.py b/src/myhdl/pinmux_generator.py
index 0dfdef591043aeb94747804d7dc2e56d57483373..8e99519becdd38cf88bf56607156039adcb0810f 100644 (file)
--- a/src/myhdl/pinmux_generator.py
+++ b/src/myhdl/pinmux_generator.py
@@ -8,6 +8,8 @@ except ImportError:
 digits = maketrans('0123456789', ' ' * 10)  # delete space later
 
 # XXX hmmm duplicated from src/bsc/actual_pinmux.py
+
+
 def transfn(temp):
     """ removes the number from the string of signal name.
     """
@@ -103,7 +105,6 @@ class Interface(object):
         return '%s{0}_%s' % (self.ifacename, name)
 
 
-
 class Interfaces(InterfacesBase):
     """ contains a list of interface definitions
     """

diff --git a/src/myhdl/pins.py b/src/myhdl/pins.py
index b8b6b78482cd145e777d628db5c5110a62f96fb2..24ddd1e831275d6c9d6601a264f72c3f88268ee9 100644 (file)
--- a/src/myhdl/pins.py
+++ b/src/myhdl/pins.py
@@ -226,6 +226,7 @@ def test_mux():
     tb.config_sim(trace=True)
     tb.run_sim(66 * period)  # run for 15 clock cycle
 
+
 test = create_test()
 
 

diff --git a/src/parse.py b/src/parse.py
index 9c45944f76f0650de180f4fe2cc91fcc53fc0049..3d508d651b63612de1385adb7f42076f1faa99aa 100644 (file)
--- a/src/parse.py
+++ b/src/parse.py
@@ -110,7 +110,6 @@ class Parse(object):
         return int(math.log(max_num_cells + 1, 2))
 
 
-
 if __name__ == '__main__':
     p = Parse()
     print (p.N_IO)

diff --git a/src/pinmux_generator.py b/src/pinmux_generator.py
index 6dcc20dbc5f24b4db383b0d68f637d6d5366a905..42a9381e2409cc4f51a4bc767319ea2dbc5406c3 100644 (file)
--- a/src/pinmux_generator.py
+++ b/src/pinmux_generator.py
@@ -95,7 +95,7 @@ if __name__ == '__main__':
             else:
                 specgen(of, output_dir, pinout, bankspec, pinspec, fixedpins)
     else:
-        gentypes = {'bsv': bsvgen, 'myhdl': myhdlgen }
+        gentypes = {'bsv': bsvgen, 'myhdl': myhdlgen}
         if output_type not in gentypes:
             print ("ERROR: output type '%s' does not exist" % output_type)
             printhelp()