remove pullup and other pad characteristics as theyre handled by the GPIO mod

diff --git a/src/bsv/interface_decl.py b/src/bsv/interface_decl.py
index 22dcc2a78009aea303abb47c81831c145ee4437c..794f86d90d5c5c494cafa8dc5b4f1e3d94cd733a 100644 (file)
--- a/src/bsv/interface_decl.py
+++ b/src/bsv/interface_decl.py
@@ -180,11 +180,6 @@ class Interface(object):
                 params.append('outputval:0,')
                 params.append('output_en:0,')
                 params.append('input_en:1,')
-            params += ['pullup_en:0,', 'pulldown_en:0,',
-                       'pushpull_en:0,', 'drivestrength:0,',
-                       'opendrain_en:0']
-            for param in params:
-                res += '                 %s\n' % param
             res += '      };\n'
         return '\n' + res
 

diff --git a/src/bsv/pinmux_generator.py b/src/bsv/pinmux_generator.py
index 62a3ea7973d1815ccc6df09ec3d8d24500136992..5e22cd376280e520653f1fd2e76ce7b54ca311a8 100644 (file)
--- a/src/bsv/pinmux_generator.py
+++ b/src/bsv/pinmux_generator.py
@@ -49,27 +49,10 @@ package pinmux;
       Bit#(1) output_en;      // output enable from core to pad         bit0
    } FunctionType deriving(Eq,Bits,FShow);
 
-   // PadCharacteristicsType: this is the controllable characteristics
-   // of the I/O cell.  They are NOT multiplexed.  Registers are to be
-   // created which manage these characteristics
-   typedef struct{
-      Bit#(1) pullup_en;      // pullup enable from core to io_cell     bit4
-      Bit#(1) pulldown_en;    // pulldown enable from core to io_cell   bit3
-      Bit#(1) drivestrength;  // drivestrength from core to io_cell     bit2
-      Bit#(1) pushpull_en;    // pushpull enable from core to io_cell   bit1
-      Bit#(1) opendrain_en;   // opendrain enable form core to io_cell  bit0
-   } PadCharacteristicsType deriving(Eq,Bits,FShow);
-
-   // TODO: leave this in for now, needs replacing with the above
    typedef struct{
       Bit#(1) outputval;      // output from core to pad                bit7
       Bit#(1) output_en;      // output enable from core to pad         bit6
       Bit#(1) input_en;       // input enable from core to io_cell      bit5
-      Bit#(1) pullup_en;      // pullup enable from core to io_cell     bit4
-      Bit#(1) pulldown_en;    // pulldown enable from core to io_cell   bit3
-      Bit#(1) drivestrength;  // drivestrength from core to io_cell     bit2
-      Bit#(1) pushpull_en;    // pushpull enable from core to io_cell   bit1
-      Bit#(1) opendrain_en;   // opendrain enable form core to io_cell  bit0
    } GenericIOType deriving(Eq,Bits,FShow);
 
 '''