rename signals
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Fri, 17 Apr 2020 15:26:20 +0000 (16:26 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Fri, 17 Apr 2020 15:26:20 +0000 (16:26 +0100)
src/soc/scoreboard/group_picker.py
src/soc/scoremulti/fu_wr_pending.py
src/soc/scoremulti/reg_sel.py

index 1f68b128b6beab393fe004ae46f324c7dcbbf785..2f33aa3d74f4f904abf2b3f97bd19f4c19eb1f4e 100644 (file)
@@ -63,14 +63,14 @@ class GroupPicker(Elaboratable):
         ri = []
         for i in range(n_src):
             rdr.append(Signal(wid, name="rdrel%d_i" % i, reset_less=True))
-            rd.append(Signal(wid, name="gordl%d_i" % i, reset_less=True))
+            rd.append(Signal(wid, name="gord%d_o" % i, reset_less=True))
             ri.append(Signal(wid, name="readable%d_i" % i, reset_less=True))
         wrr = []
         wr = []
         wi = []
         for i in range(n_dst):
             wrr.append(Signal(wid, name="reqrel%d_i" % i, reset_less=True))
-            wr.append(Signal(wid, name="gowr%d_i" % i, reset_less=True))
+            wr.append(Signal(wid, name="gowr%d_o" % i, reset_less=True))
             wi.append(Signal(wid, name="writable%d_i" % i, reset_less=True))
 
         # inputs
index d1ce2d062c8ed7cca10a0caa7a6bcb26c4ff99e0..6707142e942fe40813f80462fa7f639b4deb8c0a 100644 (file)
@@ -9,16 +9,15 @@ class FU_RW_Pend(Elaboratable):
         self.n_src = n_src
         self.n_dest = n_dest
         self.reg_count = reg_count
-        self.dest_fwd_i = Signal(reg_count, reset_less=True)
         dst = []
-        for i in range(n_src):
+        for i in range(n_dest):
             j = i + 1 # name numbering to match dest1/dest2
-            dst.append(Signal(reg_count, name="dst%d" % j, reset_less=True))
+            dst.append(Signal(reg_count, name="dfwd%d_i" % j, reset_less=True))
         self.dest_fwd_i = Array(dst)
         src = []
         for i in range(n_src):
             j = i + 1 # name numbering to match src1/src2
-            src.append(Signal(reg_count, name="src%d" % j, reset_less=True))
+            src.append(Signal(reg_count, name="sfwd%d_i" % j, reset_less=True))
         self.src_fwd_i = Array(src)
 
         self.reg_wr_pend_o = Signal(reset_less=True)
index 9d36f3beeaa38da0c86290bc0a42e9e5e47bc897..46b27be73d2d60c9846aa78e54a2849b9e88c0e9 100644 (file)
@@ -9,7 +9,6 @@ class Reg_Rsv(Elaboratable):
         self.n_src = n_src
         self.n_dest = n_dest
         self.fu_count = fu_count
-        self.dest_rsel_i = Signal(fu_count, reset_less=True)
         self.dest_rsel_i = Array(Signal(fu_count, name="dst_rsel_i",
                                        reset_less=True) \
                                 for i in range(n_dest))