add note that migration to new PLRU should be blocked on #913

https://bugs.libre-soc.org/show_bug.cgi?id=913

diff --git a/src/nmutil/plru2.py b/src/nmutil/plru2.py
index d766f6c16b44ea7e5b4c2952a09c9f6004b1431e..187a7b4945c09472c238c152902fc6eb70b94458 100644 (file)
--- a/src/nmutil/plru2.py
+++ b/src/nmutil/plru2.py
@@ -3,6 +3,8 @@
 
 # new PLRU API, once all users have migrated to new API in plru2.py, then
 # plru2.py will be renamed to plru.py.
+# IMPORTANT: since the API will change more, migration should be blocked on:
+# https://bugs.libre-soc.org/show_bug.cgi?id=913
 
 from nmigen.hdl.ir import Elaboratable, Display, Signal, Array, Const, Value
 from nmigen.hdl.dsl import Module
@@ -13,6 +15,9 @@ from nmigen.lib.coding import Decoder
 class PLRU(Elaboratable):
     r""" PLRU - Pseudo Least Recently Used Replacement
 
+        IMPORTANT: since the API will change more, migration should be blocked on:
+        https://bugs.libre-soc.org/show_bug.cgi?id=913
+
         PLRU-tree indexing:
         lvl0        0
                    / \
@@ -28,6 +33,9 @@ class PLRU(Elaboratable):
     def __init__(self, log2_num_ways, debug=False):
         # type: (int, bool) -> None
         """
+        IMPORTANT: since the API will change more, migration should be blocked on:
+        https://bugs.libre-soc.org/show_bug.cgi?id=913
+
         Arguments:
         log2_num_ways: int
             the log-base-2 of the number of cache ways -- BITS in plru.vhdl