arm: Add support for tracking TCs in ISA devices

ISA devices typically need to keep track of the thread context they
are associated with. Among other things, this is required for
interrupt delivery. Add a BaseISADevice:setThreadContext() method to
wire such models to the right thread context.

Change-Id: Iad354d176c0c4c4e34c6ab8b5acaee0b69da0406
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/12399
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>

diff --git a/src/arch/arm/isa.cc b/src/arch/arm/isa.cc
index c701cc3a75beca9f95537177296adf4e51e6dc07..9a4fb2805ef42d68f4563191dcff8136edb3604e 100644 (file)
--- a/src/arch/arm/isa.cc
+++ b/src/arch/arm/isa.cc
@@ -329,6 +329,14 @@ ISA::clear64(const ArmISAParams *p)
         encodePhysAddrRange64(physAddrRange64));
 }
 
+void
+ISA::startup(ThreadContext *tc)
+{
+    pmu->setThreadContext(tc);
+
+}
+
+
 MiscReg
 ISA::readMiscRegNoEffect(int misc_reg) const
 {
@@ -1946,6 +1954,8 @@ ISA::getGenericTimer(ThreadContext *tc)
     }
 
     timer.reset(new GenericTimerISA(*generic_timer, tc->contextId()));
+    timer->setThreadContext(tc);
+
     return *timer.get();
 }
 

diff --git a/src/arch/arm/isa.hh b/src/arch/arm/isa.hh
index 9158b62aaadf0941e80bfd1c6b301eae068d3b9d..0521c43f905f5dc97a995ad3ef4887796be466ff 100644 (file)
--- a/src/arch/arm/isa.hh
+++ b/src/arch/arm/isa.hh
@@ -659,7 +659,7 @@ namespace ArmISA
             UNSERIALIZE_SCALAR(physAddrRange64);
         }
 
-        void startup(ThreadContext *tc) {}
+        void startup(ThreadContext *tc);
 
         Enums::DecoderFlavour decoderFlavour() const { return _decoderFlavour; }
 

diff --git a/src/arch/arm/isa_device.hh b/src/arch/arm/isa_device.hh
index 185e632a58ecfcd0d112294bad073b3bef9da960..374f105c1ba9191d58e6938e7a5802e050c74db6 100644 (file)
--- a/src/arch/arm/isa_device.hh
+++ b/src/arch/arm/isa_device.hh
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2014 ARM Limited
+ * Copyright (c) 2014, 2017 ARM Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -43,6 +43,8 @@
 #include "arch/arm/registers.hh"
 #include "base/compiler.hh"
 
+class ThreadContext;
+
 namespace ArmISA
 {
 
@@ -62,6 +64,7 @@ class BaseISADevice
     virtual ~BaseISADevice() {}
 
     virtual void setISA(ISA *isa);
+    virtual void setThreadContext(ThreadContext *tc) {}
 
     /**
      * Write to a system register belonging to this device.