add mkplic beginnings

diff --git a/src/bsv/bsv_lib/slow_peripherals_template.bsv b/src/bsv/bsv_lib/slow_peripherals_template.bsv
index 88cebac0d1ed4d0f80e805ca4779195d25e950d5..1eb1b939c87f494c6755fb6b66236d09be775274 100644 (file)
--- a/src/bsv/bsv_lib/slow_peripherals_template.bsv
+++ b/src/bsv/bsv_lib/slow_peripherals_template.bsv
@@ -96,7 +96,7 @@ package slow_peripherals;
                `ifdef PLIC
                        Ifc_PLIC_AXI    plic <- mkplicperipheral();
          Wire#(Bit#(TLog#(`INTERRUPT_PINS))) interrupt_id <- mkWire();
-                         Vector#(32, FIFO#(bit)) ff_gateway_queue <- replicateM(mkFIFO);
+                         Vector#(`INTERRUPT_PINS, FIFO#(bit)) ff_gateway_queue <- replicateM(mkFIFO);
                `endif
                `ifdef AXIEXP
                        Ifc_AxiExpansion                axiexp1                 <- mkAxiExpansion();    
@@ -137,7 +137,7 @@ package slow_peripherals;
       `ifdef verbose $display("Dequeing the FIFO -- PLIC Interrupt Serviced id: %d",id); `endif
                endrule
 
-    for(Integer i=0; i <32; i=i+1) begin
+    for(Integer i=0; i <`NUM_INTERRUPTS; i=i+1) begin
            rule deq_gateway_queue;
                    if(interrupt_id==fromInteger(i)) begin
                            ff_gateway_queue[i].deq;
@@ -145,11 +145,6 @@ package slow_peripherals;
         end
       endrule
     end
-    /* for connectin inputs from pinmux as itnerrupts
-      rule connect_pinmux_eint;
-        wr_interrupt<= pinmux.peripheral_side.eint_input;
-      endrule
-    */
     // NEEL EDIT OVER
                /*=======================================================*/
                /*=================== PLIC Connections ==================== */
@@ -170,72 +165,7 @@ package slow_peripherals;
           `endif
          end
                        */
-         rule rl_connect_i2c0_to_plic;
-                               `ifdef I2C0
-                                       if(i2c0.isint()==1'b1) begin
-                                               ff_gateway_queue[8].enq(1);
-                                               plic.ifc_external_irq[8].irq_frm_gateway(True);
-                                       end
-                               `else
-                                       ff_gateway_queue[8].enq(0);
-            `endif
-         endrule
-
-                       rule rl_connect_i2c1_to_plic;
-                               `ifdef I2C1
-                                       if(i2c1.isint()==1'b1) begin
-                                               ff_gateway_queue[9].enq(1);
-                                               plic.ifc_external_irq[9].irq_frm_gateway(True);
-                                       end
-            `else
-                                       ff_gateway_queue[9].enq(0);
-            `endif
-                       endrule
-
-         rule rl_connect_i2c0_timerint_to_plic;
-                               `ifdef I2C0
-                                       if(i2c0.timerint()==1'b1) begin
-                                               ff_gateway_queue[10].enq(1);
-                                               plic.ifc_external_irq[10].irq_frm_gateway(True);
-                                       end
-            `else
-                                       ff_gateway_queue[10].enq(0);
-            `endif
-                       endrule
-
-         rule rl_connect_i2c1_timerint_to_plic;
-                               `ifdef I2C1
-                                       if(i2c1.timerint()==1'b1) begin
-                                               ff_gateway_queue[11].enq(1);
-                                               plic.ifc_external_irq[11].irq_frm_gateway(True);
-                                       end
-            `else
-                                       ff_gateway_queue[11].enq(0);
-            `endif
-         endrule
-
-         rule rl_connect_i2c0_isber_to_plic;
-                               `ifdef I2C0
-                                       if(i2c0.isber()==1'b1) begin
-                                               ff_gateway_queue[12].enq(1);
-                                               plic.ifc_external_irq[12].irq_frm_gateway(True);
-                                       end
-            `else
-                                       ff_gateway_queue[12].enq(0);
-            `endif
-         endrule
-
-         rule rl_connect_i2c1_isber_to_plic;
-                               `ifdef I2C1
-                                       if(i2c1.isber()==1'b1) begin
-                                               ff_gateway_queue[13].enq(1);
-                                               plic.ifc_external_irq[13].irq_frm_gateway(True);
-               end
-            `else
-                                       ff_gateway_queue[13].enq(0);
-            `endif
-         endrule
-
+{10}
          for(Integer i = 14; i < 20; i=i+1) begin
                                rule rl_connect_qspi0_to_plic;
                                        `ifdef QSPI0

diff --git a/src/bsv/peripheral_gen.py b/src/bsv/peripheral_gen.py
index 5326144bcae74927cbc0ae2fb704eafcdf5d5e38..622feb0bf6e2fd8eb9992ea20cfea25fdf908500 100644 (file)
--- a/src/bsv/peripheral_gen.py
+++ b/src/bsv/peripheral_gen.py
@@ -158,6 +158,33 @@ class PBase(object):
     def pinname_tweak(self, pname, typ, txt):
         return txt
 
+    def num_irqs(self):
+        return 0
+
+    def mk_plic(self, inum, irq_offs):
+        res = []
+        print "mk_plic", self.name, inum, irq_offs
+        niq = self.num_irqs()
+        if niq == 0:
+            return ('', irq_offs)
+        for idx in range(niq):
+            name = "{0}{1}".format(self.name, self.mksuffix(self.name, inum))
+            plic_obj = self.plic_object(name, idx)
+            print "plic_obj", name, idx, plic_obj
+            plic = mkplic_rule.format(self.name, plic_obj, irq_offs)
+            res.append(plic)
+            irq_offs += 1 # increment to next irq
+        return ('\n'.join(res), irq_offs)
+
+mkplic_rule = \
+"""
+         rule rl_connect_{0}_to_plic_{2};
+            if({1} == 1'b1) begin
+                ff_gateway_queue[{2}].enq(1);
+                plic.ifc_external_irq[{2}].irq_frm_gateway(True);
+            end
+         endrule
+"""
 
 class uart(PBase):
 
@@ -273,6 +300,9 @@ class twi(PBase):
         return "            interface I2C_out twi{0}_out;\n" + \
                "            method Bit#(1) twi{0}_isint;"
 
+    def num_irqs(self):
+        return 3
+
     def num_axi_regs32(self):
         return 8
 
@@ -299,6 +329,12 @@ class twi(PBase):
             return "pack({0})".format(txt)
         return txt
 
+    def plic_object(self, pname, idx):
+        return ["{0}.isint()",
+                "{0}.timerint()",
+                "{0}.isber()"
+               ][idx].format(pname)
+
 
 class eint(PBase):
 
@@ -678,7 +714,7 @@ class PeripheralIface(object):
             self.slow.peripheral = self
         for fname in ['slowimport', 
                       'slowifinstance', 'slowifdecl', 'slowifdeclmux',
-                      'mkslow_peripheral',
+                      'mkslow_peripheral', 'mk_plic',
                       'mk_connection', 'mk_cellconn', 'mk_pincon']:
             fn = CallFn(self, fname)
             setattr(self, fname, types.MethodType(fn, self))
@@ -816,6 +852,19 @@ class PeripheralInterfaces(object):
         return '\n'.join(list(filter(None, ret)))
 
 
+    def mk_plic(self):
+        ret = []
+        irq_offs = 8 # XXX: DMA scovers 0-7?
+        for (name, count) in self.ifacecount:
+            for i in range(count):
+                res = self.data[name].mk_plic(i, irq_offs)
+                if not res:
+                    continue
+                (txt, irq_offs) = res
+                ret.append(txt)
+        return '\n'.join(list(filter(None, ret)))
+
+
 class PFactory(object):
     def getcls(self, name):
         for k, v in {'uart': uart,

diff --git a/src/bsv/pinmux_generator.py b/src/bsv/pinmux_generator.py
index ae39958ed2e05a3bcb3a296fd46ca1fb41f36975..fb0764718fcbf6c5907f1d8a240a0c3c71a62897 100644 (file)
--- a/src/bsv/pinmux_generator.py
+++ b/src/bsv/pinmux_generator.py
@@ -121,10 +121,11 @@ def write_slow(slow, template, p, ifaces, iocells):
     mkcellcon = ifaces.mk_cellconn()
     pincon = ifaces.mk_pincon()
     inst = ifaces.slowifinstance()
+    mkplic = ifaces.mk_plic()
     with open(slow, "w") as bsv_file:
         bsv_file.write(template.format(imports, ifdecl, regdef, slavedecl,
                                        fnaddrmap, mkslow, mkcon, mkcellcon,
-                                       pincon, inst))
+                                       pincon, inst, mkplic))
 
 
 def write_bus(bus, p, ifaces):