}
}
+#if 0
+void memcpy4(void *dest, void *src, size_t n) {
+ int i;
+ //cast src and dest to char*
+ uint32_t *src_char = (uint32_t *)src;
+ uint32_t *dest_char = (uint32_t *)dest;
+ for (i=0; i<n/4; i++) {
+#if 1
+ if ((i % 4096) == 0) {
+ puts("memcpy4 ");
+ uart_writeuint32(i);
+ puts("\r\n");
+ }
+#endif
+ dest_char[i] = src_char[i]; //copy contents byte by byte
+ }
+}
+#endif
+
void isr(void) {
}
}
#endif
if (ftr & SYS_REG_INFO_HAS_SPI_FLASH) {
- volatile uint32_t *qspi = (uint32_t*)SPI_FLASH_BASE+0x600000;
+ volatile uint32_t *qspi = (uint32_t*)SPI_FLASH_BASE+0x900000;
//volatile uint8_t *qspi_bytes = (uint8_t*)spi_offs;
// let's not, eh? writel(0xDEAF0123, (unsigned long)&(qspi[0]));
// tmp = readl((unsigned long)&(qspi[0]));
// a block of size 0x600000 into mem address 0x600000, then
// jump to it. this allows a dtb image to be executed
puts("copy QSPI\n");
- volatile uint32_t *mem = (uint32_t*)0x600000;
- fl_read(mem, 0x600000, 0x600000); // shorter (testing) 0x8000);
+ volatile uint32_t *mem = (uint32_t*)0x1000000;
+ fl_read(mem, // destination in RAM
+ 0x600000, // offset into QSPI
+ 0x1000000); // length - shorter (testing) 0x8000);
puts("dump mem\n");
for (int i=0;i<256;i++) {
tmp = readl((unsigned long)&(mem[i]));
if ((i & 0x7) == 0x7) puts("\r\n");
}
puts("\r\n");
- mtspr(8, 0x600000); // move address to LR
+ mtspr(8, 0x1000000); // move address to LR
__asm__ volatile("blr");
}