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Rip out RVC for now
[riscv-isa-sim.git]
/
configure
2013-05-14
Yunsup Lee
change riscv-isa-run to spike
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2013-02-13
Andrew Waterman
migrate to c++11
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2013-01-26
Andrew Waterman
change htif to link against libfesvr
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2011-11-12
Your Name
Remove dependence on binutils
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2011-11-11
Andrew Waterman
Use new compiler toolchain's disassembler
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2011-08-18
Andrew Waterman
don't forget to commit configure after autoconf!
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2011-07-08
Rimas Avizienis
fixes to make disassembly work under macos (with macpor...
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2011-06-20
Andrew Waterman
temporary undoing of renaming
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2011-06-13
Andrew Waterman
[sim] renamed to riscv-isa-run
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2011-06-11
Andrew Waterman
[xcc] fix configure scripts
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2011-05-29
Andrew Waterman
[sim,opcodes] improved sim build and run performance
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2011-04-15
Andrew Waterman
[sim] added icache simulator (disabled by default)
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2011-04-10
Yunsup Lee
[sim] add disable option for vector
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2011-04-10
Andrew Waterman
[sim,pk] reorganized status register
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2010-10-16
Andrew Waterman
[pk, sim] added FPU emulation support to proxy kernel
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2010-08-18
Andrew Waterman
[sim] integrated SoftFloat-3 with ISA sim; removed...
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2010-08-10
Andrew Waterman
[xcc,sim] implement FP using softfloat
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2010-07-19
Andrew Waterman
Reorganized directory structure
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