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remembered that the use of sv registers have to be loop-incremented separately
[riscv-isa-sim.git]
/
riscv
/
insn_template_sv.cc
2018-09-26
Luke Kenneth Casso...
remembered that the use of sv registers have to be...
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2018-09-26
Luke Kenneth Casso...
ok this is tricky: an extra parameter has to be passed...
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2018-09-26
Luke Kenneth Casso...
check if register redirection is active, and if vectori...
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2018-09-26
Luke Kenneth Casso...
comment why sv_insn_t is set up the way it is; add...
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2018-09-26
Luke Kenneth Casso...
shuffle things around a bit for sv, put rv32/64_name...
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