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Fix implementation of FMIN/FMAX NaN case
[riscv-isa-sim.git] / riscv / insns / auipc.h
2015-02-08 Andrew WatermanUse xlen, not xprlen, to refer to x-register width blob | commitdiff | raw
2014-02-11 Andrew WatermanRevert to old AUIPC definition blob | commitdiff | raw | diff to current
2013-09-27 Andrew WatermanUse WRITE_RD/WRITE_FRD macros to write registers blob | commitdiff | raw | diff to current
2013-09-21 Andrew WatermanUpdate ISA encoding and AUIPC semantics blob | commitdiff | raw | diff to current
2013-09-11 Andrew WatermanImplement zany immediates blob | commitdiff | raw | diff to current
2013-04-17 Andrew Watermanadd AUIPC insn; remove RDNPC insn blob | commitdiff | raw | diff to current
Simple-V augmented version of spike