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Fix implementation of FMIN/FMAX NaN case
[riscv-isa-sim.git]
/
riscv
/
insns
/
c_li.h
2017-05-17
Palmer Dabbelt
Merge remote-tracking branch 'origin/priv-1.10'
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2017-05-16
Palmer Dabbelt
Merge remote-tracking branch 'origin/debug-0.13' into...
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2017-05-14
Andrew Waterman
Make C.LI/C.LUI trapping behavior match spec
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2015-09-04
Andrew Waterman
Move towards RVC v1.8
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2015-06-01
Andrew Waterman
New RV64C proposal
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2015-04-04
Andrew Waterman
Support setting ISA/subsets with --isa flag
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2015-03-31
Andrew Waterman
Implement RVC draft
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2013-07-26
Andrew Waterman
Rip out RVC for now
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2011-06-20
Andrew Waterman
temporary undoing of renaming
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2011-06-13
Andrew Waterman
[sim] renamed to riscv-isa-run
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2011-04-12
Andrew Waterman
[xcc,sim,opcodes] more rvc instructions and bug fixes
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2011-04-10
Andrew Waterman
[xcc, sim] added rvc insn c.li; misc fixes
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