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Fix implementation of FMIN/FMAX NaN case
[riscv-isa-sim.git] / riscv / insns / c_lui.h
2017-05-17 Palmer DabbeltMerge remote-tracking branch 'origin/priv-1.10' blob | commitdiff | raw
2017-05-16 Palmer DabbeltMerge remote-tracking branch 'origin/debug-0.13' into... blob | commitdiff | raw
2017-05-14 Andrew WatermanMake C.LI/C.LUI trapping behavior match spec blob | commitdiff | raw
2015-10-06 Andrew Watermanmore work towards RVC 1.8 blob | commitdiff | raw | diff to current
2015-09-09 Andrew WatermanImprove instruction fetch blob | commitdiff | raw | diff to current
2015-09-04 Andrew WatermanMove towards RVC v1.8 blob | commitdiff | raw | diff to current
2015-06-01 Andrew WatermanNew RV64C proposal blob | commitdiff | raw | diff to current
2015-04-04 Andrew WatermanSupport setting ISA/subsets with --isa flag blob | commitdiff | raw | diff to current
2015-03-31 Andrew WatermanImplement RVC draft blob | commitdiff | raw | diff to current
Simple-V augmented version of spike