Fix implementation of FMIN/FMAX NaN case
[riscv-isa-sim.git] / riscv / insns / fmv_x_d.h
2017-10-11 Andrew WatermanMerge pull request #129 from riscv/q-extension
2017-09-28 Andrew WatermanImplement Q extension
2017-05-17 Palmer DabbeltMerge remote-tracking branch 'origin/priv-1.10'
2017-04-17 Megan WachsMerge remote-tracking branch 'origin/priv-1.10' into...
2017-04-11 Andrew WatermanImplement new FP encoding
2015-04-04 Andrew WatermanSupport setting ISA/subsets with --isa flag
2015-03-13 Andrew WatermanUpdate to new privileged spec
2013-09-27 Andrew WatermanUse WRITE_RD/WRITE_FRD macros to write registers
2013-07-27 Andrew WatermanRename MFTX/MXTF to FMV