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WIP. Doesn't work.
[riscv-isa-sim.git]
/
riscv
/
insns
/
fmv_x_d.h
2017-11-16
Andrew Waterman
Merge pull request #156 from p12nGH/noncontiguous_harts
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2017-10-11
Andrew Waterman
Merge pull request #129 from riscv/q-extension
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2017-09-28
Andrew Waterman
Implement Q extension
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2017-05-17
Palmer Dabbelt
Merge remote-tracking branch 'origin/priv-1.10'
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2017-04-17
Megan Wachs
Merge remote-tracking branch 'origin/priv-1.10' into...
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2017-04-11
Andrew Waterman
Implement new FP encoding
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2015-04-04
Andrew Waterman
Support setting ISA/subsets with --isa flag
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2015-03-13
Andrew Waterman
Update to new privileged spec
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2013-09-27
Andrew Waterman
Use WRITE_RD/WRITE_FRD macros to write registers
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2013-07-27
Andrew Waterman
Rename MFTX/MXTF to FMV
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