2016-09-02 |
Andrew Waterman | Merge pull request #62 from riscv/trigger |
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2016-09-02 |
Tim Newsome | Merge branch 'master' into trigger |
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2016-08-31 |
Tim Newsome | Rename tdata[0-2] to tdata[1-3]. |
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2016-08-29 |
Tim Newsome | Rename tdata0--tdata2 to tdata1--tdata3. |
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2016-08-27 |
Andrew Waterman | Add (degenerate) performance counter facility |
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2016-08-26 |
Andrew Waterman | partially update spike to newer debug spec |
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2016-08-26 |
Andrew Waterman | Fix spike interactive (-d) mode |
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2016-08-22 |
Tim Newsome | Implement address and data triggers. |
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2016-08-17 |
Andrew Waterman | Allow mstatus.MPP to store bad values; instead, validat... |
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2016-07-28 |
Tim Newsome | Add support for virtual priv register. (#59) |
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2016-06-29 |
Andrew Waterman | Disassemble RVC instructions based on XLEN |
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2016-06-23 |
Andrew Waterman | Remove legacy HTIF; implement HTIF directly |
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2016-06-23 |
Andrew Waterman | Fix paddr_bits computation prior to VM setup |
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2016-05-23 |
Tim Newsome | Make -H halt the core right out of reset. |
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2016-05-23 |
Tim Newsome | Single step appears to work. |
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2016-05-23 |
Tim Newsome | processor_t unfriends gdbserver_t. |
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2016-05-23 |
Tim Newsome | Add debug_module bus device. |
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2016-05-23 |
Tim Newsome | When gdb connects, jump to Debug ROM and segfault. |
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2016-05-23 |
Tim Newsome | Gutting direct-access gdb. |
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2016-05-23 |
Tim Newsome | Add writing to DCSR, DPC, DSCRATCH. |
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2016-05-23 |
Tim Newsome | Flush icache when using swbps and report to gdb. |
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2016-05-23 |
Tim Newsome | Looks like single step works. |
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2016-05-23 |
Tim Newsome | Now you can halt/continue from gdb. |
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2016-05-23 |
Tim Newsome | gdb can now read spike memory. |
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2016-05-02 |
Andrew Waterman | Remove tohost/fromhost registers |
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2016-04-29 |
Andrew Waterman | Move much closer to new platform-M memory map |
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2016-04-28 |
Andrew Waterman | Remove MTIME[CMP]; add RTC device |
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2016-03-02 |
Andrew Waterman | Add counter-enable registers |
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2016-03-02 |
Andrew Waterman | WIP on priv spec v1.9 |
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2016-03-02 |
Andrew Waterman | New definitions of misa/marchid/mvendorid |
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2016-03-02 |
Andrew Waterman | WIP on priv spec v1.9 |
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2015-12-17 |
Scott Beamer | another osx clang compatability fix |
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2015-11-13 |
Andrew Waterman | Generate device tree for target machine |
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2015-10-26 |
Andrew Waterman | Fix histogram for RVC |
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2015-09-16 |
Scott Beamer | commit log now correctly prints privilege |
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2015-09-09 |
Andrew Waterman | Improve instruction fetch |
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2015-07-05 |
Andrew Waterman | New machine-mode timer facility |
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2015-06-01 |
Andrew Waterman | Use single, shared real-time counter |
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2015-06-01 |
Andrew Waterman | Take interrupts as soon as interrupts are enabled |
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2015-05-09 |
Andrew Waterman | Upgrade to privileged architecture 1.7 |
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2015-04-04 |
Andrew Waterman | Support setting ISA/subsets with --isa flag |
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2015-03-27 |
Andrew Waterman | Serialize counters without throwing C++ exceptions |
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2015-03-13 |
Andrew Waterman | Update to new privileged spec |
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2015-01-26 |
Andrew Waterman | Fix commit log |
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2014-12-01 |
Andrew Waterman | Implement timer faithfully |
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2014-08-15 |
Christopher Celio | Added PC histogram option. |
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2014-06-13 |
Andrew Waterman | Only print commit log if instruction commits |
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2014-04-03 |
Stephen Twigg | Merge branch 'tm' |
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2014-03-15 |
Andrew Waterman | speed up compilation a bit |
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2014-01-21 |
Quan Nguyen | Merge branch 'confprec' |
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2014-01-14 |
Andrew Waterman | Improve performance for branchy code |
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2013-12-17 |
Andrew Waterman | Speed things up quite a bit |
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2013-11-25 |
Andrew Waterman | Update to new privileged ISA |
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2013-11-05 |
Albert Ou | Merge branch 'master' of github.com:ucb-bar/riscv-isa... |
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2013-10-19 |
Yunsup Lee | refactor disassembler, and add hwacha disassembler |
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2013-08-13 |
Andrew Waterman | Implement RoCC and add a dummy RoCC |
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2013-08-12 |
Andrew Waterman | Instructions are no longer member functions |
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2013-07-27 |
Andrew Waterman | Remove more vector stuff |
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2013-07-26 |
Andrew Waterman | Rip out RVC for now |
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2013-07-26 |
Andrew Waterman | Generate instruction decoder dynamically |
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2013-03-30 |
Andrew Waterman | add load-reserved/store-conditional instructions |
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2013-03-26 |
Andrew Waterman | add BSD license |
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2013-03-26 |
Andrew Waterman | expose pending interrupts in status register |
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2013-02-13 |
Andrew Waterman | add I$/D$/L2$ simulators |
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2013-01-26 |
Andrew Waterman | change htif to link against libfesvr |
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2012-08-31 |
Andrew Waterman | new tohost/fromhost semantics |
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2012-07-23 |
Andrew Waterman | correct HTIF reset behavior |
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2012-05-09 |
Andrew Waterman | per-core tohost/fromhost registers |
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2012-03-24 |
Andrew Waterman | new supervisor mode |
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2012-03-20 |
Andrew Waterman | abstract regfile behind object |
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2012-01-23 |
Andrew Waterman | disentangle decode.h from other headers |
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2011-11-11 |
Andrew Waterman | Changed supervisor mode |
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2011-06-20 |
Andrew Waterman | temporary undoing of renaming |
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2011-06-13 |
Andrew Waterman | [sim] renamed to riscv-isa-run |
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2011-06-12 |
Andrew Waterman | [xcc] minor performance tweaks |
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2011-06-12 |
Andrew Waterman | [xcc] fixed simulator build time |
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2011-06-11 |
Andrew Waterman | [xcc] cleaned up mmu code |
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2011-06-11 |
Andrew Waterman | [sim, opcodes] made sim more decoupled from opcodes |
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2011-05-29 |
Andrew Waterman | [sim,opcodes] improved sim build and run performance |
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2011-05-29 |
Andrew Waterman | [fesvr,xcc,sim] fixed multicore sim for akaros |
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2011-05-23 |
Andrew Waterman | [sim,xcc] add rdcycle/rdtime/rdinstret |
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2011-05-19 |
Yunsup Lee | [sim] vlen calc reflects the hardware |
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2011-05-18 |
Yunsup Lee | [opcodes,pk,sim] add more vector traps (for #banks... |
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2011-05-01 |
Andrew Waterman | [sim] hacked in a dcache simulator |
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2011-04-15 |
Andrew Waterman | [sim] added icache simulator (disabled by default) |
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2011-04-10 |
Yunsup Lee | [sim] add vt stuff |
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2011-02-05 |
Andrew Waterman | [sim,pk] added interrupt-pending field to cause reg |
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2011-01-19 |
Andrew Waterman | [opcodes, sim, xcc] made *w insns illegal in RV32 |
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2010-10-26 |
Yunsup Lee | [pk,sim,xcc] get rid of at register, introduce tp register |
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2010-10-05 |
Andrew Waterman | [xcc,sim] eliminated vectored traps |
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2010-09-09 |
Andrew Waterman | Merge branch 'master' of /project/eecs/parlab/git/proje... |
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2010-09-09 |
Andrew Waterman | [pk, sim] added interrupt support to sim; added timer... |
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2010-09-08 |
Yunsup Lee | [sim] add while to interactive_until |
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2010-09-07 |
Yunsup Lee | [sim] yet another fix stdint.h __STDC_LIMIT_MACROS... |
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2010-09-07 |
Andrew Waterman | [sim, xcc] added PCRs to replace k0 and k1 |
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2010-09-07 |
Andrew Waterman | [sim, xcc] bthread threading model exposed; insn encodi... |
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2010-08-24 |
Andrew Waterman | [sim] privileged mode support for 32-bit operation |
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2010-08-10 |
Andrew Waterman | [xcc,sim] implement FP using softfloat |
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2010-08-05 |
Andrew Waterman | [xcc,pk,sim] Added first part of FP support |
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2010-07-22 |
Andrew Waterman | [pk,sim] first cut of appserver communication link |
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