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check if register redirection is active, and if vectorisation enabled
[riscv-isa-sim.git] / riscv / sv.h
2018-09-26 Luke Kenneth Casso... check if register redirection is active, and if vectori... blob | commitdiff | raw
2018-09-25 Luke Kenneth Casso... add decode.h header to sv.h blob | commitdiff | raw | diff to current
2018-09-25 Luke Kenneth Casso... rename sv vlen to sv voffs, add csr and reg tables blob | commitdiff | raw | diff to current
2018-09-25 Luke Kenneth Casso... clarify sv cam table blob | commitdiff | raw | diff to current
2018-09-24 Luke Kenneth Casso... define CSR and register tables for SV blob | commitdiff | raw | diff to current
Simple-V augmented version of spike