git.libre-soc.org Git - gem5.git/history

2019-11-25	Adrian Herrera	arch-arm: default MIDR for Armv8 ISA processors	blob \| commitdiff \| raw
2019-11-18	Adrian Herrera	arch-arm: R/W interface to AArch32 HCR2 misc reg	blob \| commitdiff \| raw \| diff to current
2019-10-19	Gabe Black	arch: Make a base class for Interrupts.	blob \| commitdiff \| raw \| diff to current
2019-09-19	Giacomo Travaglini	arch-arm: PSTATE.PAN changes should inval cached regs...	blob \| commitdiff \| raw \| diff to current
2019-09-06	Giacomo Travaglini	arch-arm: Fix read/setMiscReg for AArch32 GICv3 ICC...	blob \| commitdiff \| raw \| diff to current
2019-08-07	Jordi Vaquero	arch-arm: adding register control flags enabling LSE...	blob \| commitdiff \| raw \| diff to current
2019-08-05	Giacomo Travaglini	arch-arm: Implement ARMv8.1-PAN, Privileged access...	blob \| commitdiff \| raw \| diff to current
2019-05-23	Giacomo Travaglini	arch-arm: Expose haveGicv3CPUInterface to the ISA interface	blob \| commitdiff \| raw \| diff to current
2019-04-25	Giacomo Travaglini	arch-arm: Remove un-needed hyp flag in TLBI operations	blob \| commitdiff \| raw \| diff to current
2019-04-25	Giacomo Travaglini	arch-arm: Correct target EL field in TLBI operations	blob \| commitdiff \| raw \| diff to current
2019-04-02	Giacomo Travaglini	dev-arm: Make GICv3 maintenance interrupt an ArmInterrupt	blob \| commitdiff \| raw \| diff to current
2019-03-14	Giacomo Gabrielli	arch-arm,cpu: Add initial support for Arm SVE	blob \| commitdiff \| raw \| diff to current
2019-02-18	Giacomo Travaglini	arch-arm: Move GICv3 detection at startup time	blob \| commitdiff \| raw \| diff to current
2019-01-25	Giacomo Travaglini	arch-arm: Inital vector rename mode depending on A32/A64	blob \| commitdiff \| raw \| diff to current
2019-01-22	Gabe Black	arch: cpu: Stop passing around misc registers by reference.	blob \| commitdiff \| raw \| diff to current
2019-01-22	Gabe Black	arm: Get rid of some register type definitions.	blob \| commitdiff \| raw \| diff to current
2019-01-16	Giacomo Travaglini	arch-arm: Read VMPIDR instead of MPIDR when EL2 is...	blob \| commitdiff \| raw \| diff to current
2019-01-16	Anouk Van Laer	arch-arm: Added TLBI_ALL EL2 instruction	blob \| commitdiff \| raw \| diff to current
2019-01-10	Jairo Balart	dev-arm: Add a GICv3 model	blob \| commitdiff \| raw \| diff to current
2019-01-03	Curtis Dunham	arm: properly handle RES0/1 for SCTLRs	blob \| commitdiff \| raw \| diff to current
2018-12-19	Giacomo Travaglini	arch-arm: Add Crypto in SE mode	blob \| commitdiff \| raw \| diff to current
2018-11-14	Giacomo Travaglini	arch-arm: Print register name when warning on AT instru...	blob \| commitdiff \| raw \| diff to current
2018-11-07	Giacomo Travaglini	arch-arm: ArmSystem::resetAddr64 renamed to be used...	blob \| commitdiff \| raw \| diff to current
2018-11-07	Giacomo Travaglini	arch-arm: Refactor ISA::clear by adding a ISA::clear32...	blob \| commitdiff \| raw \| diff to current
2018-10-09	Giacomo Travaglini	arch-arm: Add have_crypto System parameter	blob \| commitdiff \| raw \| diff to current
2018-10-01	Giacomo Travaglini	arch-arm: Implement AArch64 ID_AA64MMFR2_EL1 register	blob \| commitdiff \| raw \| diff to current
2018-10-01	Giacomo Travaglini	arch-arm: Init AArch64 ID registers in SE mode	blob \| commitdiff \| raw \| diff to current
2018-09-10	Andreas Sandberg	arm: Add support for tracking TCs in ISA devices	blob \| commitdiff \| raw \| diff to current
2018-07-16	Giacomo Travaglini	arch-arm: Introduce ARMv8.1 Virtual Timer System Registers	blob \| commitdiff \| raw \| diff to current
2018-06-14	Giacomo Travaglini	arch-arm: Add Illegal Execution flag to PCState	blob \| commitdiff \| raw \| diff to current
2018-06-11	Giacomo Travaglini	misc: Using smart pointers for memory Requests	blob \| commitdiff \| raw \| diff to current
2018-05-29	Giacomo Travaglini	arch-arm: ISA param for treating MISCREG_IMPDEF_UNIMPL...	blob \| commitdiff \| raw \| diff to current
2018-05-08	Giacomo Travaglini	arch-arm: Map ID_x_EL1 registers to AArch32 version	blob \| commitdiff \| raw \| diff to current
2018-04-19	Giacomo Travaglini	arch-arm: Add ARMv8.1 TTBR1_EL2 register	blob \| commitdiff \| raw \| diff to current
2018-04-18	Chuan Zhu	arch-arm: Fix masking in CPACR_EL1	blob \| commitdiff \| raw \| diff to current
2018-04-18	Chuan Zhu	arch-arm: Mask out unsupported trapped exception handli...	blob \| commitdiff \| raw \| diff to current
2018-04-18	Chuan Zhu	arch-arm: Correct masking of cp10 and cp11 in CPACR	blob \| commitdiff \| raw \| diff to current
2018-04-18	Giacomo Travaglini	arch-arm: Using explicit invalidation in TLB	blob \| commitdiff \| raw \| diff to current
2018-04-06	Giacomo Travaglini	arch-arm: Fix secure write of SCTLR when EL3 is AArch64	blob \| commitdiff \| raw \| diff to current
2018-03-23	Giacomo Travaglini	arch-arm: Distinguish IS TLBI from non-IS	blob \| commitdiff \| raw \| diff to current
2018-03-23	Giacomo Travaglini	arch-arm: Created function for TLB ASID Invalidation	blob \| commitdiff \| raw \| diff to current
2018-03-12	Giacomo Travaglini	arch-arm: Adding IPA-Based Invalidating instructions	blob \| commitdiff \| raw \| diff to current
2018-03-12	Giacomo Travaglini	arch-arm: Implement missing aarch32 TLBI registers	blob \| commitdiff \| raw \| diff to current
2018-03-08	Giacomo Travaglini	arch-arm: Fix FSC generation in AbortFault	blob \| commitdiff \| raw \| diff to current
2018-02-16	Giacomo Travaglini	arch-arm: Change ArmFault cast from reinterpret to...	blob \| commitdiff \| raw \| diff to current
2018-02-08	Giacomo Travaglini	arch-arm: Don't change PSTATE in Illegal Exception...	blob \| commitdiff \| raw \| diff to current
2018-01-29	Curtis Dunham	arch-arm: understandably initialize register permissions	blob \| commitdiff \| raw \| diff to current
2018-01-29	Curtis Dunham	arm: extend MiscReg metadata structures	blob \| commitdiff \| raw \| diff to current
2018-01-29	Curtis Dunham	arch-arm: understandably initialize register mappings	blob \| commitdiff \| raw \| diff to current
2017-12-22	Gabe Black	arch,cpu: "virtualize" the TLB interface.	blob \| commitdiff \| raw \| diff to current
2017-12-14	Jason Lowe-Power	misc: Updates for gcc7.2 for x86	blob \| commitdiff \| raw \| diff to current
2017-07-05	Rekai Gonzalez-Alb...	cpu: Added interface for vector reg file	blob \| commitdiff \| raw \| diff to current
2017-02-09	Bjoern A. Zeeb	arm: AArch64 report cache size correctly when reading...	blob \| commitdiff \| raw \| diff to current
2016-11-09	Brandon Potter	style: [patch 1/22] use /r/3648/ to reorganize includes	blob \| commitdiff \| raw \| diff to current
2016-12-19	Curtis Dunham	arm: provide correct timer availability in ID_PFR1...	blob \| commitdiff \| raw \| diff to current
2016-12-19	Curtis Dunham	arm: compute ID_AA64PFR{0,1}_EL1 registers	blob \| commitdiff \| raw \| diff to current
2016-12-19	Curtis Dunham	arm: compute ID_PFR{0,1} registers	blob \| commitdiff \| raw \| diff to current
2016-12-19	Curtis Dunham	arm: miscreg refactoring	blob \| commitdiff \| raw \| diff to current
2016-12-19	Curtis Dunham	arm: audit SCTLR	blob \| commitdiff \| raw \| diff to current
2016-12-19	Curtis Dunham	arm: remove SCTLR.FI	blob \| commitdiff \| raw \| diff to current
2016-12-19	Curtis Dunham	arm: update AArch{64,32} register mappings	blob \| commitdiff \| raw \| diff to current
2016-08-15	Nikos Nikoleris	cpu, arch: fix the type used for the request flags	blob \| commitdiff \| raw \| diff to current
2016-08-02	Dylan Johnson	arm: Add TLBI instruction for stage 2 IPA's	blob \| commitdiff \| raw \| diff to current
2016-08-02	Dylan Johnson	arm: Fix EL perceived at TLB for address translation...	blob \| commitdiff \| raw \| diff to current
2016-08-02	Dylan Johnson	arm: add stage2 translation support	blob \| commitdiff \| raw \| diff to current
2016-08-02	Curtis Dunham	arm: enable EL2 support	blob \| commitdiff \| raw \| diff to current
2016-08-02	Dylan Johnson	arm: invalidate TLB miscreg cache on modification of...	blob \| commitdiff \| raw \| diff to current
2016-07-11	Andreas Sandberg	arm: Don't consult the TLB test iface for functional...	blob \| commitdiff \| raw \| diff to current
2016-04-07	Mitch Hayenga	mem: Remove threadId from memory request class	blob \| commitdiff \| raw \| diff to current
2016-04-06	Andreas Sandberg	Revert power patch sets with unexpected interactions	blob \| commitdiff \| raw \| diff to current
2016-04-05	Mitch Hayenga	mem: Remove threadId from memory request class	blob \| commitdiff \| raw \| diff to current
2015-10-09	Rekai Gonzalez Alb...	isa: Add parameter to pick different decoder inside ISA	blob \| commitdiff \| raw \| diff to current
2015-09-30	Mitch Hayenga	isa,cpu: Add support for FS SMT Interrupts	blob \| commitdiff \| raw \| diff to current
2015-06-09	Rune Holm	arm: Delete debug print in initialization of hardware...	blob \| commitdiff \| raw \| diff to current
2015-05-23	Andreas Sandberg	dev, arm: Refactor and clean up the generic timer model	blob \| commitdiff \| raw \| diff to current
2015-05-05	Andreas Hansson	arm: Remove unnecessary boot uncachability	blob \| commitdiff \| raw \| diff to current
2015-03-02	Andreas Sandberg	arm: Don't truncate 16-bit ASIDs to 8 bits	blob \| commitdiff \| raw \| diff to current
2015-01-22	Andreas Hansson	mem: Clean up Request initialisation	blob \| commitdiff \| raw \| diff to current
2014-12-23	Andreas Sandberg	arm: Add support for filtering in the PMU	blob \| commitdiff \| raw \| diff to current
2014-10-30	Ali Saidi	automated merge	blob \| commitdiff \| raw \| diff to current
2014-10-30	Ali Saidi	arm: Fix multi-system AArch64 boot w/caches.	blob \| commitdiff \| raw \| diff to current
2014-10-16	Andreas Sandberg	arm: Add a model of an ARM PMUv3	blob \| commitdiff \| raw \| diff to current
2014-04-29	Curtis Dunham	arm: use condition code registers for ARM ISA	blob \| commitdiff \| raw \| diff to current
2014-04-17	Ali Saidi	arm: allow DC instructions by default so SE mode works	blob \| commitdiff \| raw \| diff to current
2014-05-09	Geoffrey Blake	arm: Panics in miscreg read functions can be tripped...	blob \| commitdiff \| raw \| diff to current
2014-01-24	ARM gem5 Developers	arm: Add support for ARMv8 (AArch64 & AArch32)	blob \| commitdiff \| raw \| diff to current
2014-01-24	Andreas Hansson	arch: Make all register index flattening const	blob \| commitdiff \| raw \| diff to current
2013-07-18	Andreas Hansson	mem: Set the cache line size on a system level	blob \| commitdiff \| raw \| diff to current
2013-01-07	Andreas Sandberg	arm: Remove the register mapping hack used when copying TCs	blob \| commitdiff \| raw \| diff to current
2013-01-07	Andreas Sandberg	arm: Make ID registers ISA parameters	blob \| commitdiff \| raw \| diff to current
2013-01-07	Andreas Sandberg	arch: Make the ISA class inherit from SimObject	blob \| commitdiff \| raw \| diff to current
2013-01-05	Gabe Black	Decoder: Remove the thread context get/set from the...	blob \| commitdiff \| raw \| diff to current
2013-01-05	Gabe Black	ARM: Keep a copy of the fpscr len and stride fields...	blob \| commitdiff \| raw \| diff to current
2012-07-27	Anthony Gutierrez	ARM: fix value of MISCREG_CTR returned by readMiscReg()	blob \| commitdiff \| raw \| diff to current
2012-06-05	Chander Sudanthi	ARM: Fix MPIDR and MIDR register implementation.	blob \| commitdiff \| raw \| diff to current
2012-03-09	Geoffrey Blake	CheckerCPU: Make CheckerCPU runtime selectable instead...	blob \| commitdiff \| raw \| diff to current
2012-03-02	Ali Saidi	ARM: FIx a bug preventing multiple cores booting a...	blob \| commitdiff \| raw \| diff to current
2012-03-01	Ali Saidi	ARM: Add support for Versatile Express extended memory map	blob \| commitdiff \| raw \| diff to current
2012-03-01	Matt Horsnell	ARM: Add limited CP14 support.	blob \| commitdiff \| raw \| diff to current
2012-02-12	Ali Saidi	mem: Add a master ID to each request object.	blob \| commitdiff \| raw \| diff to current
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