| 2020-07-31 |
Jordi Vaquero | arch-arm: Implementing SecureEL2 feature for Armv8 |
blob | commitdiff | raw |
| 2020-07-27 |
Jordi Vaquero | arch-arm: Implement ARM8.1-VHE feature |
blob | commitdiff | raw | diff to current |
| 2020-07-23 |
Jordi Vaquero | arch-arm: Add System register trap check for EL1 |
blob | commitdiff | raw | diff to current |
| 2020-07-06 |
Jordi Vaquero | arch-arm: Implementation of Vector Catch debug exception |
blob | commitdiff | raw | diff to current |
| 2020-07-04 |
Bobby R. Bruce | misc: Merged m5ops_base hotfix into develop |
blob | commitdiff | raw | diff to current |
| 2020-06-29 |
Jordi Vaquero | arch-arm: Implementation of ARMv8 SelfDebug Watchpoints |
blob | commitdiff | raw | diff to current |
| 2020-06-26 |
Gabe Black | arm: Add a missing "break" in an ARM miscreg decode... |
blob | commitdiff | raw | diff to current |
| 2020-06-22 |
Jordi Vaquero | arch-arm: Implementation of Hardware Breakpoint exception |
blob | commitdiff | raw | diff to current |
| 2020-03-10 |
Adrian Herrera | arch-arm: GenericTimer arch regs, perms/trapping |
blob | commitdiff | raw | diff to current |
| 2020-02-26 |
Bobby R. Bruce | misc: merge branch 'release-staging-v19.0.0.0' into... |
blob | commitdiff | raw | diff to current |
| 2020-02-24 |
Bobby R. Bruce | misc: Merged release-staging-v19.0.0.0 into develop |
blob | commitdiff | raw | diff to current |
| 2020-02-19 |
Adrian Herrera | arch-arm: Fix CNTFRQ_EL0 permission bits |
blob | commitdiff | raw | diff to current |
| 2020-02-18 |
Gabe Black | arm: Delete authors lists from the arm files. |
blob | commitdiff | raw | diff to current |
| 2020-02-06 |
Jordi Vaquero | arch-arm: This commit adds Pointer Authentication feature. |
blob | commitdiff | raw | diff to current |
| 2020-02-05 |
Gabe Black | arm: Use static_cast to get access the ARM specific... |
blob | commitdiff | raw | diff to current |
| 2020-02-04 |
Adrian Herrera | arch-arm: AArch64 reg access HCR_EL2.E2H filter |
blob | commitdiff | raw | diff to current |
| 2019-11-18 |
Adrian Herrera | arch-arm: R/W interface to AArch32 HCR2 misc reg |
blob | commitdiff | raw | diff to current |
| 2019-09-06 |
Giacomo Travaglini | arch-arm, dev-arm: MISCREG_ICC_IGRPEN1_EL1 using AA64... |
blob | commitdiff | raw | diff to current |
| 2019-09-06 |
Giacomo Travaglini | arch-arm, dev-arm: MISCREG_ICC_AP1R0_EL1 using AA64... |
blob | commitdiff | raw | diff to current |
| 2019-09-06 |
Giacomo Travaglini | arch-arm, dev-arm: MISCREG_ICC_CTLR_EL1 using AA64... |
blob | commitdiff | raw | diff to current |
| 2019-09-06 |
Giacomo Travaglini | arch-arm: MISCREG_ICC_BPR1_EL1 using AA64 banking |
blob | commitdiff | raw | diff to current |
| 2019-09-06 |
Giacomo Travaglini | arch-arm: Add explicit AArch64 MiscReg banking |
blob | commitdiff | raw | diff to current |
| 2019-09-06 |
Giacomo Travaglini | arch-arm: SGI registers undecoded in AArch32 |
blob | commitdiff | raw | diff to current |
| 2019-08-20 |
Giacomo Travaglini | arch-arm: Replace occ of opModeToEL(currOpMode/cpsr... |
blob | commitdiff | raw | diff to current |
| 2019-08-05 |
Giacomo Travaglini | arch-arm: Implement ARMv8.1-PAN, Privileged access... |
blob | commitdiff | raw | diff to current |
| 2019-03-14 |
Giacomo Gabrielli | arch-arm,cpu: Add initial support for Arm SVE |
blob | commitdiff | raw | diff to current |
| 2019-01-10 |
Jairo Balart | dev-arm: Add a GICv3 model |
blob | commitdiff | raw | diff to current |
| 2019-01-03 |
Curtis Dunham | arm: properly handle RES0/1 for SCTLRs |
blob | commitdiff | raw | diff to current |
| 2018-11-07 |
Giacomo Travaglini | arch-arm: Implement AArch32 RVBAR |
blob | commitdiff | raw | diff to current |
| 2018-10-26 |
Giacomo Travaglini | arch-arm: IMPDEF for SYS instruction with CRn = {11... |
blob | commitdiff | raw | diff to current |
| 2018-10-01 |
Giacomo Travaglini | arch-arm: Implement AArch64 ID_AA64MMFR2_EL1 register |
blob | commitdiff | raw | diff to current |
| 2018-07-16 |
Giacomo Travaglini | arch-arm: Introduce ARMv8.1 Virtual Timer System Registers |
blob | commitdiff | raw | diff to current |
| 2018-07-16 |
Giacomo Travaglini | arch-arm: Introduce RAS System Registers |
blob | commitdiff | raw | diff to current |
| 2018-06-06 |
Andreas Sandberg | dev, arm: Add support for HYP & secure timers |
blob | commitdiff | raw | diff to current |
| 2018-05-29 |
Giacomo Travaglini | arch-arm: ISA param for treating MISCREG_IMPDEF_UNIMPL... |
blob | commitdiff | raw | diff to current |
| 2018-05-29 |
Giacomo Travaglini | arch-arm: Remove unusued MISCREG_A64_UNIMPL |
blob | commitdiff | raw | diff to current |
| 2018-05-29 |
Giacomo Travaglini | arch-arm: S3_<op1>_<Cn>_<Cm>_<op2> are Implementation... |
blob | commitdiff | raw | diff to current |
| 2018-05-29 |
Giacomo Travaglini | arch-arm: Implement ARMv8.1 TTBR1_EL2 register |
blob | commitdiff | raw | diff to current |
| 2018-05-08 |
Giacomo Travaglini | arch-arm: Map ID_x_EL1 registers to AArch32 version |
blob | commitdiff | raw | diff to current |
| 2018-04-19 |
Giacomo Travaglini | arch-arm: Add ARMv8.1 TTBR1_EL2 register |
blob | commitdiff | raw | diff to current |
| 2018-04-18 |
Chuan Zhu | arch-arm: Fix FPEXC32_EL2 to FPEXC mapping |
blob | commitdiff | raw | diff to current |
| 2018-04-17 |
Giacomo Travaglini | arch-arm: Fix secure MiscReg access when EL3 is not... |
blob | commitdiff | raw | diff to current |
| 2018-03-12 |
Giacomo Travaglini | arch-arm: Adding IPA-Based Invalidating instructions |
blob | commitdiff | raw | diff to current |
| 2018-03-12 |
Giacomo Travaglini | arch-arm: Implement missing aarch32 TLBI registers |
blob | commitdiff | raw | diff to current |
| 2018-02-16 |
Giacomo Travaglini | arch-arm: IMPLEMENTATION DEFINED register |
blob | commitdiff | raw | diff to current |
| 2018-02-07 |
Nikos Nikoleris | arch-arm: Fault when dc ivac is executed from EL0 |
blob | commitdiff | raw | diff to current |
| 2018-02-07 |
Giacomo Travaglini | arch-arm: Change function name for banked miscregs |
blob | commitdiff | raw | diff to current |
| 2018-01-29 |
Curtis Dunham | arch-arm: understandably initialize register permissions |
blob | commitdiff | raw | diff to current |
| 2017-12-08 |
Giacomo Travaglini | arm: Change access permission in TPIDRURO and TPIDRURW |
blob | commitdiff | raw | diff to current |
| 2017-12-04 |
Gabe Black | misc: Rename misc.(hh|cc) to logging.(hh|cc) |
blob | commitdiff | raw | diff to current |
| 2017-12-01 |
Giacomo Travaglini | arm: Enable ns registers access in secure mode |
blob | commitdiff | raw | diff to current |
| 2017-11-09 |
Nikos Nikoleris | arch-arm: Allow dc ivac from EL0 when SCTLR_EL1.UCI=1 |
blob | commitdiff | raw | diff to current |
| 2017-04-03 |
Nikos Nikoleris | arm: Don't panic when checking coprocessor read/write... |
blob | commitdiff | raw | diff to current |
| 2016-11-09 |
Brandon Potter | style: [patch 1/22] use /r/3648/ to reorganize includes |
blob | commitdiff | raw | diff to current |
| 2016-12-19 |
Curtis Dunham | arm: miscreg refactoring |
blob | commitdiff | raw | diff to current |
| 2016-08-02 |
Dylan Johnson | arm: warn not fail on use of missing miscreg CNTHCTL_EL2 |
blob | commitdiff | raw | diff to current |
| 2016-08-02 |
Curtis Dunham | arm: enable EL2 support |
blob | commitdiff | raw | diff to current |
| 2015-05-26 |
Curtis Dunham | arm: implement the CONTEXTIDR_EL2 system reg. |
blob | commitdiff | raw | diff to current |
| 2015-05-23 |
Andreas Sandberg | dev, arm: Add virtual timers to the generic timer model |
blob | commitdiff | raw | diff to current |
| 2015-05-05 |
Giacomo Gabrielli | arm: enable DCZVA by default in SE mode |
blob | commitdiff | raw | diff to current |
| 2014-12-08 |
Andreas Sandberg | arm: Fix decoding of PMXEVTYPER_EL0 and PMCCFILTR_EL0 |
blob | commitdiff | raw | diff to current |
| 2014-10-30 |
Ali Saidi | automated merge |
blob | commitdiff | raw | diff to current |
| 2014-10-30 |
Ali Saidi | arm: Mark some miscregs (timer counter) registers at... |
blob | commitdiff | raw | diff to current |
| 2014-09-02 |
Akash Bagdia | arm: Don't speculatively access most miscregisters. |
blob | commitdiff | raw | diff to current |
| 2014-10-01 |
Andreas Hansson | arm: Use MiscRegIndex rather than int when flattening |
blob | commitdiff | raw | diff to current |
| 2014-08-13 |
Dam Sunwoo | arm: change MISCREG_L2ERRSR to warn not fail |
blob | commitdiff | raw | diff to current |
| 2014-05-09 |
Geoffrey Blake | arm: Panics in miscreg read functions can be tripped... |
blob | commitdiff | raw | diff to current |
| 2014-01-24 |
ARM gem5 Developers | arm: Add support for ARMv8 (AArch64 & AArch32) |
blob | commitdiff | raw | diff to current |
| 2013-10-31 |
Chander Sudanthi | ARM: add support for TEEHBR access |
blob | commitdiff | raw | diff to current |
| 2012-05-10 |
Ali Saidi | gem5: Fix a number of incorrect case statements |
blob | commitdiff | raw | diff to current |
| 2012-03-19 |
Andreas Hansson | gcc: Clean-up of non-C++0x compliant code, first steps |
blob | commitdiff | raw | diff to current |
| 2012-03-01 |
Matt Horsnell | ARM: Add limited CP14 support. |
blob | commitdiff | raw | diff to current |
| 2012-02-01 |
Gabe Black | Merge ... head, hopefully the last time for this batch. |
blob | commitdiff | raw | diff to current |
| 2012-01-31 |
Koan-Sin Tan | clang: Enable compiling gem5 using clang 2.9 and 3.0 |
blob | commitdiff | raw | diff to current |
| 2011-09-13 |
Chander Sudanthi | CP15 c15: enable execution with accesses to c15 registers |
blob | commitdiff | raw | diff to current |
| 2011-09-13 |
Daniel Johnson | ARM: Implement numcpus bits in L2CTLR register. |
blob | commitdiff | raw | diff to current |
| 2011-02-23 |
Ali Saidi | ARM: Adds dummy support for a L2 latency miscreg. |
blob | commitdiff | raw | diff to current |
| 2011-01-18 |
Matt Horsnell | ARM: The ARM decoder should not panic when decoding... |
blob | commitdiff | raw | diff to current |
| 2010-08-23 |
Ali Saidi | ARM: Implement some more misc registers |
blob | commitdiff | raw | diff to current |
| 2010-06-02 |
Ali Saidi | ARM: Some TLB bug fixes. |
blob | commitdiff | raw | diff to current |
| 2010-06-02 |
Ali Saidi | ARM: Move Miscreg functions out of isa.hh |
blob | commitdiff | raw | diff to current |
| 2010-06-02 |
Ali Saidi | ARM: Implement the ARM TLB/Tablewalker. Needs performan... |
blob | commitdiff | raw | diff to current |
| 2010-06-02 |
Gabe Black | ARM: Convert the CP15 registers from MPU to MMU. |
blob | commitdiff | raw | diff to current |
| 2010-06-02 |
Gabe Black | ARM: Implement a function to decode CP15 registers... |
blob | commitdiff | raw | diff to current |
|
projects / gem5.git / history