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misc: Replaced master/slave terminology
[gem5.git]
/
src
/
arch
/
arm
/
miscregs_types.hh
2020-08-26
Giacomo Travaglini
arch-arm: Rewrite addressTranslation to use BitUnions
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2020-07-27
Jordi Vaquero
arch-arm: Implement ARM8.1-VHE feature
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2020-07-23
Jordi Vaquero
arch-arm: Add System register trap check for EL1
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2020-07-06
Jordi Vaquero
arch-arm: Implementation of Vector Catch debug exception
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2020-07-04
Bobby R. Bruce
misc: Merged m5ops_base hotfix into develop
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2020-06-29
Jordi Vaquero
arch-arm: Implementation of ARMv8 SelfDebug Watchpoints
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2020-06-22
Jordi Vaquero
arch-arm: Implementation of Hardware Breakpoint exception
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2020-04-06
Giacomo Travaglini
arch-arm: CNTHCTL trap to EL2 only if ARMv8.6-ECV imple...
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2020-02-26
Bobby R. Bruce
misc: merge branch 'release-staging-v19.0.0.0' into...
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2020-02-24
Bobby R. Bruce
misc: Merged release-staging-v19.0.0.0 into develop
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2020-02-18
Gabe Black
arm: Delete authors lists from the arm files.
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2020-02-06
Jordi Vaquero
arch-arm: This commit adds Pointer Authentication feature.
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2019-12-18
Adrian Herrera
arch-arm: Secure EL2 checking
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2019-11-18
Adrian Herrera
arch-arm: R/W interface to AArch32 HCR2 misc reg
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2019-08-05
Giacomo Travaglini
arch-arm: Implement ARMv8.1-PAN, Privileged access...
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2019-07-19
Giacomo Travaglini
arch-arm: Add HPD bit for TCR_EL2/EL3
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2019-03-14
Giacomo Gabrielli
arch-arm,cpu: Add initial support for Arm SVE
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2019-01-09
Ivan Pizarro
arch-arm: Additional bits in misc ARM registers to...
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2018-11-07
Giacomo Travaglini
arch-arm: Remove SCTLR.VE bit
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2018-10-02
Edmund Grimley Evans
arch-arm: Add FP16 support and other primitives to...
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2018-10-01
Giacomo Travaglini
arch-arm: Implement AArch64 ID regs as bitunions
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2018-10-01
Giacomo Travaglini
arch-arm: Move MiscReg BitUnions into a separate header...
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