| 2019-09-18 |
Giacomo Travaglini | arch-arm: Fix Data Abort ISS when caused by Atomic... |
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| 2019-09-18 |
Giacomo Travaglini | arch-arm: PSTATE.PAN affecting EL2 only when HCR_EL2... |
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| 2019-08-20 |
Giacomo Travaglini | arch-arm: Replace occ of opModeToEL(currOpMode/cpsr... |
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| 2019-08-05 |
Giacomo Travaglini | arch-arm: Implement ARMv8.1-PAN, Privileged access... |
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| 2019-07-17 |
Giacomo Travaglini | arch-arm: Use ExceptionLevel type in TlbEntry |
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| 2019-06-26 |
Anouk Van Laer | arch, arm: Update miscRegs in getTE |
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| 2019-05-14 |
Javier Bueno | arch-arm: Do not check MustBeOne flag for TLB requests... |
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| 2019-04-26 |
Giacomo Travaglini | arch-arm: updateMiscReg not setting isHyp in aarch64 |
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| 2019-04-25 |
Giacomo Travaglini | arch-arm: Remove un-needed hyp flag in TLBI operations |
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| 2019-03-21 |
Andrea Mondelli | dev-arm: ambiguous use of getPort() |
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| 2019-03-19 |
Gabe Black | arch, cpu, dev, gpu, mem, sim, python: start using... |
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| 2019-03-01 |
Andrea Mondelli | mem-cache: alias to mem::getMasterPort in TLB class |
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| 2018-11-28 |
Rekai Gonzalez-Alb... | cpu,arch-arm: Initialise data members |
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| 2018-11-05 |
Anouk Van Laer | arch, arm: Effect of AT instructions on descriptor... |
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| 2018-06-14 |
Giacomo Travaglini | arch-arm: Add Illegal Execution flag to PCState |
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| 2018-06-11 |
Giacomo Travaglini | misc: Using smart pointers for memory Requests |
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| 2018-06-06 |
Andreas Sandberg | arch-arm: Respect EL from translation type |
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| 2018-02-16 |
Chuan Zhu | arch-arm: Fix syntax error in TLB::getResultTe |
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| 2018-02-07 |
Nikos Nikoleris | arch-arm: Check cache maintenance insts for permission... |
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| 2018-02-07 |
Giacomo Travaglini | arch-arm: Change function name for banked miscregs |
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| 2017-12-22 |
Gabe Black | arch,cpu: "virtualize" the TLB interface. |
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| 2017-12-05 |
Nikos Nikoleris | arm: Add CMO support for Non-Cacheable memory |
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| 2017-05-09 |
Andreas Sandberg | arm: Add support for memory-mapped m5ops |
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| 2017-02-21 |
Nikos Nikoleris | arm: Blame the right instruction address on a Prefetch... |
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| 2016-11-09 |
Brandon Potter | style: [patch 1/22] use /r/3648/ to reorganize includes |
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| 2016-08-15 |
Nikos Nikoleris | cpu, arch: fix the type used for the request flags |
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| 2016-08-02 |
Dylan Johnson | arm: Add TLBI instruction for stage 2 IPA's |
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| 2016-08-02 |
Dylan Johnson | arm: Fix stage 2 determination in table walker |
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| 2016-08-02 |
Dylan Johnson | arm: Fix EL perceived at TLB for address translation... |
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| 2016-08-02 |
Dylan Johnson | arm: add stage2 translation support |
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| 2016-07-11 |
Andreas Sandberg | arm: Don't consult the TLB test iface for functional... |
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| 2016-06-06 |
Stephan Diestelhorst | sim: Call regStats of base-class as well |
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| 2016-06-02 |
Curtis Dunham | arm: refactor page table format determination |
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| 2016-05-31 |
Andreas Sandberg | arm: Correctly check translation mode (aarch64/aarch32) |
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| 2016-05-26 |
Andreas Sandberg | arm: Fix incorrect TLB permission check in aarch32 |
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| 2016-03-21 |
Andreas Sandberg | arm: Refactor the TLB test interface |
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| 2016-02-07 |
Steve Reinhardt | style: fix missing spaces in control statements |
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| 2015-09-30 |
Mitch Hayenga | arm: Change TLB Software Caching |
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| 2015-08-21 |
Andreas Hansson | arm, mem: Remove unused CLEAR_LL request flag |
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| 2015-07-07 |
Andreas Sandberg | sim: Refactor the serialization base class |
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| 2015-06-21 |
Andreas Sandberg | arm: Cleanup arch headers to remove dma_device.hh depen... |
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| 2015-05-26 |
Nathanael Premillieu | arm: Make address translation faster with better caching |
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| 2015-05-05 |
Andreas Sandberg | arm: Relax ordering for some uncacheable accesses |
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| 2015-05-05 |
Andreas Sandberg | mem, cpu: Add a separate flag for strictly ordered... |
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| 2015-05-05 |
Andreas Hansson | arm: Remove unnecessary boot uncachability |
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| 2015-03-02 |
Andreas Hansson | arm: Share a port for the two table walker objects |
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| 2014-12-23 |
Andreas Sandberg | arm: Raise an alignment fault if a PC has illegal alignment |
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| 2014-11-14 |
Andreas Hansson | arm: Fixes based on UBSan and static analysis |
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| 2014-10-30 |
Ali Saidi | automated merge |
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| 2014-10-30 |
Ali Saidi | arm: Fix multi-system AArch64 boot w/caches. |
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| 2014-10-16 |
Andreas Hansson | arch: Use shared_ptr for all Faults |
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| 2014-10-16 |
Andreas Sandberg | arm: Add TLB PMU probes |
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| 2014-09-27 |
Andreas Hansson | arm: Fixed undefined behaviours identified by gcc |
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| 2014-09-12 |
Andrew Bardsley | style: Fix line continuation, especially in debug messages |
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| 2014-05-09 |
Geoffrey Blake | arch, arm: Preserve TLB bootUncacheability when switchi... |
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| 2014-01-24 |
ARM gem5 Developers | arm: Add support for ARMv8 (AArch64 & AArch32) |
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| 2014-01-24 |
Dam Sunwoo | mem: per-thread cache occupancy and per-block ages |
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| 2013-10-31 |
Prakash Ramrakhyani | mem: Add privilege info to request class |
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| 2013-06-03 |
Andreas Sandberg | arch: Create a method to finalize physical addresses |
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| 2013-02-15 |
Mrinmoy Ghosh | arm: fix a page table walker issue where a page could... |
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| 2013-01-07 |
Andreas Sandberg | arm: Invalidate cached TLB configuration in drainResume |
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| 2012-10-15 |
Andreas Hansson | Port: Add protocol-agnostic ports in the port hierarchy |
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| 2012-03-30 |
William Wang | MEM: Introduce the master/slave port sub-classes in C++ |
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| 2012-02-01 |
Gabe Black | Merge ... head, hopefully the last time for this batch. |
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| 2012-01-31 |
Geoffrey Blake | CheckerCPU: Re-factor CheckerCPU to be compatible with... |
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| 2012-01-31 |
Gabe Black | Merge with main repository. |
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| 2012-01-29 |
Gabe Black | Yet another merge with the main repository. |
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| 2012-01-29 |
Gabe Black | Implement Ali's review feedback. |
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| 2012-01-28 |
Gabe Black | Merge with the main repo. |
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| 2012-01-16 |
Gabe Black | Merge yet again with the main repository. |
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| 2012-01-07 |
Gabe Black | Another merge with the main repository. |
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| 2012-01-07 |
Gabe Black | Merge with the main repository again. |
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| 2012-01-07 |
Gabe Black | Merge with main repository. |
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| 2011-11-02 |
Gabe Black | SE/FS: Get rid of FULL_SYSTEM in the ARM ISA. |
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| 2011-10-16 |
Gabe Black | ARM: Turn on the page table walker on ARM in SE mode. |
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| 2011-09-13 |
Daniel Johnson | ARM: update TLB to set request packet ASID field |
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| 2011-08-19 |
Ali Saidi | ARM: Mark some variables uncacheable until boot all... |
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| 2011-06-16 |
Ali Saidi | ARM: Handle case where new TLB size is different from... |
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| 2011-06-16 |
Chander Sudanthi | ARM: Fix memset on TLB flush and initialization |
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| 2011-04-15 |
Nathan Binkert | trace: reimplement the DTRACE function so it doesn... |
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| 2011-04-04 |
Ali Saidi | ARM: Fix table walk going on while ASID changes error |
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| 2011-02-23 |
Ali Saidi | ARM: Fix bug that let two table walks occur in parallel. |
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| 2011-02-22 |
Brad Beckmann | m5: merged in hammer fix |
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| 2011-02-16 |
Nathan Binkert | merge alpha system files into tree |
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| 2011-02-12 |
Giacomo Gabrielli | O3: Enhance data address translation by supporting... |
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| 2011-01-18 |
Matt Horsnell | O3: Fixes the way prefetches are handled inside the... |
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| 2010-12-08 |
Ali Saidi | ARM: Support switchover with hardware table walkers |
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| 2010-11-15 |
Ali Saidi | ARM: Cache the misc regs at the TLB to limit readMiscRe... |
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| 2010-11-08 |
Ali Saidi | ARM: Add some TLB statistics for ARM |
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| 2010-11-08 |
Ali Saidi | ARM: Add checkpointing support |
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| 2010-10-31 |
Gabe Black | ISA,CPU,etc: Create an ISA defined PC type that abstrac... |
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| 2010-10-13 |
Gabe Black | Mem: Change the CLREX flag to CLEAR_LL. |
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| 2010-10-01 |
Ali Saidi | ARM: Make the TLB a little bit faster by moving most... |
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| 2010-10-01 |
Ali Saidi | ARM: Implement functional virtual to physical address... |
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| 2010-08-23 |
Gene Wu | MEM: Make CLREX a first class request operation and... |
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| 2010-08-23 |
Gene Wu | ARM: Make sure that software prefetch instructions... |
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| 2010-08-23 |
Gene Wu | ARM: Fix Uncachable TLB requests and decoding of xn bit |
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| 2010-08-23 |
Gene Wu | ARM: For non-cachable accesses set the UNCACHABLE flag |
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| 2010-08-23 |
Gene Wu | ARM: Implement CLREX |
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| 2010-06-15 |
Nathan Binkert | stats: only consider a formula initialized if there... |
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