2020-02-04 |
Giacomo Travaglini | arch-arm: Split translateFs to distinguish when MMU... |
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2020-01-22 |
Gabe Black | arm: Remove checkpointing from the ARM TLBs. |
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2019-08-05 |
Giacomo Travaglini | arch-arm: Implement ARMv8.1-PAN, Privileged access... |
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2019-07-17 |
Giacomo Travaglini | arch-arm: Use ExceptionLevel type in TlbEntry |
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2019-04-25 |
Giacomo Travaglini | arch-arm: Remove un-needed hyp flag in TLBI operations |
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2019-03-19 |
Gabe Black | arch, cpu, dev, gpu, mem, sim, python: start using... |
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2019-03-01 |
Andrea Mondelli | mem-cache: alias to mem::getMasterPort in TLB class |
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2018-11-05 |
Anouk Van Laer | arch, arm: Effect of AT instructions on descriptor... |
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2018-06-11 |
Giacomo Travaglini | misc: Using smart pointers for memory Requests |
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2018-06-06 |
Andreas Sandberg | arch-arm: Respect EL from translation type |
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2018-03-23 |
Giacomo Travaglini | arch-arm: Distinguish IS TLBI from non-IS |
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2018-01-09 |
Gabe Black | arm: Make translateFunctional override the base impleme... |
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2017-12-22 |
Gabe Black | arch,cpu: "virtualize" the TLB interface. |
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2017-05-09 |
Andreas Sandberg | arm: Add support for memory-mapped m5ops |
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2016-08-02 |
Dylan Johnson | arm: Add TLBI instruction for stage 2 IPA's |
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2016-08-02 |
Dylan Johnson | arm: Fix EL perceived at TLB for address translation... |
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2016-03-21 |
Andreas Sandberg | arm: Refactor the TLB test interface |
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2015-10-12 |
Andreas Hansson | misc: Add explicit overrides and fix other clang >... |
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2015-10-12 |
Andreas Hansson | misc: Remove redundant compiler-specific defines |
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2015-09-30 |
Mitch Hayenga | arm: Change TLB Software Caching |
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2015-07-07 |
Andreas Sandberg | sim: Refactor and simplify the drain API |
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2015-07-07 |
Andreas Sandberg | sim: Refactor the serialization base class |
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2015-06-21 |
Andreas Sandberg | arm: Cleanup arch headers to remove dma_device.hh depen... |
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2015-05-26 |
Nathanael Premillieu | arm: Make address translation faster with better caching |
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2015-05-05 |
Andreas Hansson | arm: Remove unnecessary boot uncachability |
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2015-03-02 |
Andreas Hansson | arm: Share a port for the two table walker objects |
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2015-02-11 |
Andreas Sandberg | sim: Move the BaseTLB to src/arch/generic/ |
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2014-10-16 |
Andreas Hansson | arch: Use shared_ptr for all Faults |
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2014-10-16 |
Andreas Sandberg | arm: Add TLB PMU probes |
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2014-05-09 |
Geoffrey Blake | arch, arm: Preserve TLB bootUncacheability when switchi... |
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2014-01-24 |
ARM gem5 Developers | arm: Add support for ARMv8 (AArch64 & AArch32) |
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2013-06-03 |
Andreas Sandberg | arch: Create a method to finalize physical addresses |
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2013-02-15 |
Mrinmoy Ghosh | arm: fix a page table walker issue where a page could... |
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2013-01-07 |
Andreas Sandberg | arm: Invalidate cached TLB configuration in drainResume |
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2012-10-15 |
Andreas Hansson | Port: Add protocol-agnostic ports in the port hierarchy |
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2012-03-30 |
William Wang | MEM: Introduce the master/slave port sub-classes in C++ |
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2012-02-01 |
Gabe Black | Merge ... head, hopefully the last time for this batch. |
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2012-01-31 |
Geoffrey Blake | CheckerCPU: Re-factor CheckerCPU to be compatible with... |
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2012-01-31 |
Gabe Black | Merge with main repository. |
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2012-01-29 |
Gabe Black | Yet another merge with the main repository. |
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2012-01-28 |
Gabe Black | Merge with the main repo. |
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2012-01-16 |
Gabe Black | Merge yet again with the main repository. |
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2012-01-07 |
Gabe Black | Another merge with the main repository. |
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2012-01-07 |
Gabe Black | Merge with the main repository again. |
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2012-01-07 |
Gabe Black | Merge with main repository. |
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2011-10-16 |
Gabe Black | ARM: Turn on the page table walker on ARM in SE mode. |
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2011-09-13 |
Daniel Johnson | ARM: update TLB to set request packet ASID field |
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2011-08-19 |
Ali Saidi | ARM: Mark some variables uncacheable until boot all... |
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2011-05-13 |
Chander Sudanthi | ARM: Better RealView/Versatile EB platform support. |
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2011-04-15 |
Nathan Binkert | includes: sort all includes |
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2011-02-04 |
Gabe Black | Fault: Rename sim/fault.hh to fault_fwd.hh to distingui... |
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2011-01-03 |
Steve Reinhardt | Make commenting on close namespace brackets consistent. |
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2010-12-20 |
Gabe Black | Style: Replace some tabs with spaces. |
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2010-12-08 |
Ali Saidi | ARM: Support switchover with hardware table walkers |
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2010-11-15 |
Ali Saidi | ARM: Cache the misc regs at the TLB to limit readMiscRe... |
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2010-11-08 |
Ali Saidi | ARM: Add some TLB statistics for ARM |
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2010-11-08 |
Ali Saidi | ARM: Add checkpointing support |
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2010-10-01 |
Ali Saidi | ARM: Make the TLB a little bit faster by moving most... |
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2010-10-01 |
Ali Saidi | ARM: Implement functional virtual to physical address... |
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2010-09-14 |
Gabe Black | Faults: Pass the StaticInst involved, if any, to a... |
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2010-08-26 |
Gabe Black | ARM: Implement all ARM SIMD instructions. |
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2010-08-23 |
Gene Wu | MEM: Make CLREX a first class request operation and... |
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2010-08-23 |
Gene Wu | ARM: Implement CLREX |
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2010-06-15 |
Nathan Binkert | stats: only consider a formula initialized if there... |
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2010-06-02 |
Dam Sunwoo | ARM: Added support for Access Flag and some CP15 regs... |
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2010-06-02 |
Ali Saidi | ARM: Some TLB bug fixes. |
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2010-06-02 |
Ali Saidi | ARM: Implement the ARM TLB/Tablewalker. Needs performan... |
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2010-06-02 |
Ali Saidi | ARM: Start over with translation from Alpha code as... |
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2010-06-02 |
Gabe Black | ARM: Implement the V7 version of alignment checking. |
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2009-04-21 |
Nathan Binkert | Automated merge with ssh://m5sim.org//repo/m5 |
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2009-04-21 |
Nathan Binkert | arm: Unify the ARM tlb. We forgot about this when... |
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2009-04-06 |
Gabe Black | Merge ARM into the head. ARM will compile but may not... |
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2009-04-06 |
Stephen Hines | arm: add ARM support to M5 |
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