git.libre-soc.org Git - gem5.git/history - src/arch/riscv/decoder.hh

2020-08-20	Gabe Black	arch: Create a base class for decoders.	blob \| commitdiff \| raw
2020-02-26	Bobby R. Bruce	misc: merge branch 'release-staging-v19.0.0.0' into...	blob \| commitdiff \| raw \| diff to current
2020-02-24	Bobby R. Bruce	misc: Merged release-staging-v19.0.0.0 into develop	blob \| commitdiff \| raw \| diff to current
2020-02-18	Gabe Black	riscv: Delete authors lists from riscv files.	blob \| commitdiff \| raw \| diff to current
2018-03-27	Gabe Black	arch: cpu: Make the ExtMachInst type a template argumen...	blob \| commitdiff \| raw \| diff to current
2017-12-04	Gabe Black	misc: Rename misc.(hh\|cc) to logging.(hh\|cc)	blob \| commitdiff \| raw \| diff to current
2017-07-14	Alec Roelke	riscv: Fix bugs with RISC-V decoder and detailed CPUs	blob \| commitdiff \| raw \| diff to current
2017-07-11	Alec Roelke	arch-riscv: Add support for compressed extension RV64C	blob \| commitdiff \| raw \| diff to current
2016-11-30	Alec Roelke	arch: [Patch 1/5] Added RISC-V base instruction set...	blob \| commitdiff \| raw \| diff to current