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arch-riscv: Stop "using namespace std"
[gem5.git]
/
src
/
arch
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riscv
/
isa
/
decoder.isa
2021-01-23
Gabe Black
arch-riscv: Stop "using namespace std"
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2020-11-16
Bobby R. Bruce
misc: Merge branch hotfix v20.1.0.2 branch into develop
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2020-10-27
Giacomo Travaglini
arch-riscv: Replace any getDTBPtr/getITBPtr usage
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2020-10-01
Bobby R. Bruce
misc: Merge branch 'release-staging-v20.1.0.0' into...
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2020-09-25
Bobby R. Bruce
misc: Merge branch 'release-staging-v20.1.0.0' into...
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2020-09-22
Bobby R. Bruce
misc: Merge branch 'release-staging-v20.1.0.0' into...
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2020-09-17
Bobby R. Bruce
misc: Merge branch 'release-staging-v20.1.0.0' into...
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2020-09-16
Gabe Black
arch,cpu: Rearrange StaticInst flags for memory barriers.
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2020-04-29
Nils Asmussen
arch-riscv: let FPU instructions fault if status.FS...
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2020-04-29
Nils Asmussen
arch-riscv: make uret,sret,mret SerializeAfter,NonSpecu...
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2020-04-29
Nils Asmussen
arch-riscv: make accesses to CSRs SerializeAfter.
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2020-04-29
Nils Asmussen
arch-riscv: fault according to status.{TVM,TSK,TW}.
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2020-04-29
Nils Asmussen
arch-riscv: added dummy implementation of wfi instruction.
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2020-04-29
Nils Asmussen
arch-riscv: implement sfence.vma to flush TLBs.
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2020-03-26
Nils Asmussen
arch-riscv: added support for pseudo instructions.
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2020-02-26
Bobby R. Bruce
misc: merge branch 'release-staging-v19.0.0.0' into...
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2020-02-24
Bobby R. Bruce
misc: Merged release-staging-v19.0.0.0 into develop
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2020-02-18
Gabe Black
riscv: Delete authors lists from riscv files.
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2020-02-10
Gabe Black
riscv: Cast to float explicitly when comparing a float...
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2019-11-26
Ian Jiang
arch-riscv: Fix immediate decoding for integer shift...
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2019-11-26
Ian Jiang
arch-riscv: Fix disassembling for fence and fence.i
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2019-11-25
Ian Jiang
arch-riscv: Fix disassembling of operand list for compr...
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2019-11-25
Ian Jiang
arch-riscv: Fix disassembling of immediate for U-type...
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2019-05-03
Avishai Tvila
arch-riscv,isa: Fix for compressed jump (c_j) imm
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2019-02-08
Tuan Ta
riscv: fix AMO, LR and SC instructions
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2019-02-06
Tuan Ta
riscv: remove NonSpeculative flag from fence inst
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2019-01-31
Gabe Black
riscv: Get rid of some ISA specific register types.
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2018-07-28
Alec Roelke
arch-riscv: Add xret instructions
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2018-07-28
Alec Roelke
arch-riscv: Add support for trap value register
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2018-07-09
Austin Harris
arch-riscv: Fix the srlw and srliw instructions.
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2018-05-12
Alec Roelke
arch-riscv: Update CSR implementations
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2018-03-20
Tuan Ta
riscv: throw IllegalInstFault when decoding invalid...
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2018-02-19
Alec Roelke
arch-riscv: Fix compressed branch op offset
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2018-01-16
Alec Roelke
arch-riscv: Fix floating-poing op classes
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2018-01-16
Alec Roelke
arch-riscv: Fix floating-point conversion bugs
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2018-01-10
Alec Roelke
arch-riscv: Make use of ImmOp's polymorphism
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2017-11-29
Alec Roelke
arch-riscv: Move parts of mem insts out of ISA
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2017-07-14
Gabe Black
riscv: Disambiguate between the C and C++ versions...
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2017-07-14
Alec Roelke
riscv: Fix bugs with RISC-V decoder and detailed CPUs
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2017-07-11
Alec Roelke
arch-riscv: Add support for compressed extension RV64C
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2017-07-11
Alec Roelke
arch-riscv: Restructure ISA description
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2017-04-05
Alec Roelke
riscv: fix Linux problems with LR and SC ops
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2016-11-30
Alec Roelke
riscv: [Patch 7/5] Corrected LRSC semantics
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2016-11-30
Alec Roelke
riscv: [Patch 4/5] Added RISC-V atomic memory extension...
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2016-11-30
Alec Roelke
riscv: [Patch 3/5] Added RISCV floating point extension...
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2016-11-30
Alec Roelke
riscv: [Patch 2/5] Added RISC-V multiply extension...
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2016-11-30
Alec Roelke
arch: [Patch 1/5] Added RISC-V base instruction set...
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