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arch: Add generic BaseMMU
[gem5.git] / src / arch / riscv / isa /
2020-10-01 Bobby R. Brucemisc: Merge branch 'release-staging-v20.1.0.0' into... tree | commitdiff
2020-09-25 Bobby R. Brucemisc: Merge branch 'release-staging-v20.1.0.0' into... tree | commitdiff
2020-09-22 Bobby R. Brucemisc: Merge branch 'release-staging-v20.1.0.0' into... tree | commitdiff
2020-09-17 Bobby R. Brucemisc: Merge branch 'release-staging-v20.1.0.0' into... tree | commitdiff
2020-09-16 Gabe Blackarch,cpu: Get rid of the IsMemRef StaticInst flag. tree | commitdiff
2020-09-16 Gabe Blackarch,cpu: Rearrange StaticInst flags for memory barriers. tree | commitdiff
2020-08-28 Ian Jiangarch-riscv: Fix disassembling of jalr tree | commitdiff
2020-04-29 Nils Asmussenarch-riscv: let FPU instructions fault if status.FS... tree | commitdiff
2020-04-29 Nils Asmussenarch-riscv: make uret,sret,mret SerializeAfter,NonSpecu... tree | commitdiff
2020-04-29 Nils Asmussenarch-riscv: make accesses to CSRs SerializeAfter. tree | commitdiff
2020-04-29 Nils Asmussenarch-riscv: fault according to status.{TVM,TSK,TW}. tree | commitdiff
2020-04-29 Nils Asmussenarch-riscv: added dummy implementation of wfi instruction. tree | commitdiff
2020-04-29 Nils Asmussenarch-riscv: fault on mstatus accesses from lower privil... tree | commitdiff
2020-04-29 Nils Asmussenarch-riscv: implement sfence.vma to flush TLBs. tree | commitdiff
2020-04-22 Gabe Blackbase,arch,sim,cpu: Move object file loader components... tree | commitdiff
2020-03-27 Gabe Blackriscv: Fix RISCV builds by updating its use of pseudoIn... tree | commitdiff
2020-03-26 Nils Asmussenarch-riscv: added support for pseudo instructions. tree | commitdiff
2020-03-10 Giacomo Travaglinimisc: string.join has been removed in python3 tree | commitdiff
2020-02-26 Bobby R. Brucemisc: merge branch 'release-staging-v19.0.0.0' into... tree | commitdiff
2020-02-24 Bobby R. Brucemisc: Merged release-staging-v19.0.0.0 into develop tree | commitdiff
2020-02-18 Gabe Blackriscv: Delete authors lists from riscv files. tree | commitdiff
2020-02-10 Gabe Blackriscv: Cast to float explicitly when comparing a float... tree | commitdiff
2019-12-01 Ian Jiangarch-riscv: Fix disassembling of immediate for c.lui... tree | commitdiff
2019-11-26 Ian Jiangarch-riscv: Fix immediate decoding for integer shift... tree | commitdiff
2019-11-26 Ian Jiangarch-riscv: Fix disassembling for fence and fence.i tree | commitdiff
2019-11-25 Ian Jiangarch-riscv: Fix disassembling of operand list for compr... tree | commitdiff
2019-11-25 Ian Jiangarch-riscv: Fix disassembling of immediate for U-type... tree | commitdiff
2019-11-18 Gabe Blackarch: Make and use endian specific versions of the... tree | commitdiff
2019-05-03 Avishai Tvilaarch-riscv,isa: Fix for compressed jump (c_j) imm tree | commitdiff
2019-02-08 Tuan Tariscv: fix AMO, LR and SC instructions tree | commitdiff
2019-02-06 Tuan Tariscv: remove NonSpeculative flag from fence inst tree | commitdiff
2019-01-31 Gabe Blackriscv: Get rid of some ISA specific register types. tree | commitdiff
2019-01-16 Alec Roelkearch-riscv: Add interrupt handling tree | commitdiff
2018-07-28 Alec Roelkearch-riscv: Add xret instructions tree | commitdiff
2018-07-28 Alec Roelkearch-riscv: Add support for trap value register tree | commitdiff
2018-07-09 Austin Harrisarch-riscv: Fix the srlw and srliw instructions. tree | commitdiff
2018-05-12 Alec Roelkearch-riscv: Update CSR implementations tree | commitdiff
2018-03-20 Tuan Tariscv: throw IllegalInstFault when decoding invalid... tree | commitdiff
2018-02-19 Alec Roelkearch-riscv: Fix compressed branch op offset tree | commitdiff
2018-01-29 Gabe Blackriscv: Add overrides to various StaticInst methods. tree | commitdiff
2018-01-16 Alec Roelkearch-riscv: Fix floating-poing op classes tree | commitdiff
2018-01-16 Alec Roelkearch-riscv: Fix floating-point conversion bugs tree | commitdiff
2018-01-10 Alec Roelkearch-riscv: Make use of ImmOp's polymorphism tree | commitdiff
2017-12-13 Gabe Blackcpu,alpha,mips,power,riscv,sparc: Get rid of eaComp... tree | commitdiff
2017-12-07 Alec Roelkearch-riscv: Move compressed ops out of ISA tree | commitdiff
2017-11-30 Alec Roelkearch-riscv: use sext rather than manual masks tree | commitdiff
2017-11-30 Alec Roelkearch-riscv: Remove spaces around ea_code tree | commitdiff
2017-11-29 Alec Roelkearch-riscv: Remove static parts of AMOs out of ISA tree | commitdiff
2017-11-29 Alec Roelkearch-riscv: Move parts of mem insts out of ISA tree | commitdiff
2017-11-29 Alec Roelkearch-riscv: Move unknown out of ISA description tree | commitdiff
2017-11-29 Alec Roelkearch-riscv: Move standard ops out of ISA tree | commitdiff
2017-11-28 Alec Roelkearch-riscv: Move static_inst into a directory tree | commitdiff
2017-11-07 Gabe Blackalpha,arm,mips,power,riscv,sparc,x86: Merge exec decl... tree | commitdiff
2017-11-02 Gabe Blackalpha,arm,mips,power,riscv,sparc,x86,isa: De-specialize... tree | commitdiff
2017-07-14 Gabe Blackriscv: Disambiguate between the C and C++ versions... tree | commitdiff
2017-07-14 Alec Roelkeriscv: Fix bugs with RISC-V decoder and detailed CPUs tree | commitdiff
2017-07-11 Alec Roelkearch-riscv: Add support for compressed extension RV64C tree | commitdiff
2017-07-11 Alec Roelkearch-riscv: Restructure ISA description tree | commitdiff
2017-07-05 Rekai Gonzalez-Alb... cpu: Simplify the rename interface and use RegId tree | commitdiff
2017-07-05 Nathanael Premillieuarch, cpu: Architectural Register structural indexing tree | commitdiff
2017-04-05 Alec Roelkeriscv: fix Linux problems with LR and SC ops tree | commitdiff
2016-11-30 Alec Roelkeriscv: [Patch 7/5] Corrected LRSC semantics tree | commitdiff
2016-11-30 Alec Roelkeriscv: [Patch 4/5] Added RISC-V atomic memory extension... tree | commitdiff
2016-11-30 Alec Roelkeriscv: [Patch 3/5] Added RISCV floating point extension... tree | commitdiff
2016-11-30 Alec Roelkeriscv: [Patch 2/5] Added RISC-V multiply extension... tree | commitdiff
2016-11-30 Alec Roelkearch: [Patch 1/5] Added RISC-V base instruction set... tree | commitdiff