cpu: Add HTM ExecContext API
[gem5.git] / src / arch / riscv /
2019-11-02 Gabe Blackarch,cpu: Move endianness conversion of inst bytes...
2019-10-30 Gabe Blackarch: Make endianness a property of the OS class syscal...
2019-10-25 Gabe Blackmips,riscv: Get rid of some Alpha cruft in these System...
2019-10-25 Gabe Blackcpu: Create a PCEventScope class to abstract the scope...
2019-10-19 Gabe Blackarch: Make a base class for Interrupts.
2019-10-16 Gabe Blackarch,base,sim: Move Process loader hooks into the Proce...
2019-10-12 Gabe Blackarch,base: Separate the idea of a memory image and...
2019-10-10 Gabe Blackarch,base: Stop loading the interpreter in ElfObject.
2019-10-10 Gabe Blackarch, base: Stop assuming object files have three segments.
2019-10-09 Gabe Blackarch-mips,arch-riscv,base: Get rid of the unused HexFil...
2019-10-09 Gabe Blackbase: Rename Section to Segment, and some of its members.
2019-08-23 Alec Roelkearch-riscv: fix GDB register cache
2019-08-21 Yifei Liuarch-riscv: Update register file
2019-05-30 Gabe Blackarch, base, cpu, gpu, sim: Merge getMemProxy and getVir...
2019-05-29 Ciro Santillisim-se: add a release parameter to Process.py
2019-05-21 Brandon Pottersim-se: change syscall function signature
2019-05-20 Gabe Blackriscv: Add an object file loader for linux.
2019-05-04 Alec Roelkearch-riscv: Implement MHARTID CSR
2019-05-03 Avishai Tvilaarch-riscv,isa: Fix for compressed jump (c_j) imm
2019-04-30 Gabe Blackarch: Stop using TheISA within the ISAs.
2019-04-28 Gabe Blackarch, sim: Simplify the AuxVector type.
2019-02-12 Andreas Sandbergpython: Don't assume SimObjects live in the global...
2019-02-08 Tuan Tariscv: fix AMO, LR and SC instructions
2019-02-08 Tuan Tariscv: fixed syscall return value
2019-02-08 Tuan Tariscv: ignore nanosleep syscall
2019-02-08 Tuan Taarch-riscv: initialize RISC-V's thread pointer register...
2019-02-07 Austin Harrisarch-riscv: Enable support for riscv 32-bit in SE mode.
2019-02-06 Tuan Tariscv: remove NonSpeculative flag from fence inst
2019-02-06 Tuan Taarch-riscv: Initialize interrupt mask
2019-02-05 Andrea Mondellimisc: added missing override specifier
2019-02-05 Austin Harrisriscv: Get rid of ISA specific register types in Interr...
2019-02-01 Gabe Blackcpu, arch: Replace the CCReg type with RegVal.
2019-01-31 Gabe Blackriscv: Get rid of some ISA specific register types.
2019-01-31 Gabe Blackarch: cpu: Rename *FloatRegBits* to *FloatReg*.
2019-01-30 Giacomo Gabrielliarch,cpu: Add vector predicate registers
2019-01-24 Gabe Blackbase: arch: Get rid of the now unused FloatRegVal type.
2019-01-22 Gabe Blackarch: cpu: Stop passing around misc registers by reference.
2019-01-22 Brandon Pottersim-se: add syscalls related to polling
2019-01-16 Gabe Blackarch: Make the ISA register types aliases for the globa...
2019-01-16 Alec Roelkearch-riscv: Add interrupt handling
2019-01-16 Alec Roelkearch-riscv: Fix reset function and style
2019-01-10 Andreas Sandbergsim-se: Refactor clone to avoid most ifdefs
2018-09-19 Brandon Pottersyscall_emul: expand AuxVector class
2018-07-28 Alec Roelkearch-riscv: Add xret instructions
2018-07-28 Alec Roelkearch-riscv: Add support for trap value register
2018-07-28 Alec Roelkearch-riscv: Add support for fault handling
2018-07-09 Robertarch-riscv: enable rudimentary fs simulation
2018-07-09 Austin Harrisarch-riscv: Fix the srlw and srliw instructions.
2018-06-11 Giacomo Travaglinimisc: Using smart pointers for memory Requests
2018-06-11 Giacomo Travaglinimisc: Substitute pointer to Request with aliased RequestPtr
2018-05-12 Alec Roelkearch-riscv: Update CSR implementations
2018-03-27 Gabe Blackarch: cpu: Make the ExtMachInst type a template argumen...
2018-03-26 Gabe Blackarch: Fix all override related warnings.
2018-03-26 Gabe Blackarch: Add a virtual asBytes function to the StaticInst...
2018-03-20 Tuan Tariscv: throw IllegalInstFault when decoding invalid...
2018-02-19 Alec Roelkearch-riscv: Fix compressed branch op offset
2018-01-29 Gabe Blackriscv: Add overrides to various StaticInst methods.
2018-01-20 Gabe Blackarch, mem: Make the page table lookup function return...
2018-01-20 Gabe Blacksim, arch, base: Refactor the base remote GDB class.
2018-01-19 Gabe Blackarch, mem, sim: Consolidate and rename the SE mode...
2018-01-16 Alec Roelkearch-riscv: Fix floating-poing op classes
2018-01-16 Alec Roelkearch-riscv: Fix floating-point conversion bugs
2018-01-15 Gabe Blackarch: Fix a fatal_if in most of the arch's process...
2018-01-11 Alec Roelkearch-riscv: Don't crash when printing unknown CSRs
2018-01-11 Gabe Blackarch,mem: Remove the default value for page size.
2018-01-11 Gabe Blackarch,mem: Move page table construction into the arch...
2018-01-10 Alec Roelkearch-riscv: Make use of ImmOp's polymorphism
2018-01-10 Gabe Blackalpha,arm,mips,power,riscv,sparc,x86,cpu: Get rid of...
2018-01-05 Tuan Taarch-riscv: Ignore sched_yield syscall in SE mode
2018-01-05 Tuan Taarch-riscv: Ignore set_robust_list and get_robust_list...
2018-01-05 Tuan Taarch-riscv: Add an implementation of set_tid_address...
2018-01-05 Alec Roelkearch-riscv: Correct syscall argument reg count
2018-01-04 Alec Roelkearch-riscv: Remove "magic" syscall number constant
2017-12-23 Gabe Blackalpha,arm,mips,power,riscv,sparc,x86: Get rid of TheISA...
2017-12-23 Gabe Blackriscv,x86: Stop using the arch Nop machine instruction...
2017-12-22 Gabe Blackarch,cpu: "virtualize" the TLB interface.
2017-12-14 Alec Roelkearch-riscv: Define AT_RANDOM properly
2017-12-14 Alec Roelkearch-riscv: Increase maximum stack size
2017-12-13 Gabe Blackcpu,alpha,mips,power,riscv,sparc: Get rid of eaComp...
2017-12-07 Alec Roelkearch-riscv: Move compressed ops out of ISA
2017-12-04 Gabe Blackmisc: Rename misc.(hh|cc) to logging.(hh|cc)
2017-11-30 Alec Roelkearch-riscv: use sext rather than manual masks
2017-11-30 Alec Roelkearch-riscv: Remove spaces around ea_code
2017-11-29 Alec Roelkearch-riscv: Add missing license paragraphs
2017-11-29 Alec Roelkearch-riscv: Remove static parts of AMOs out of ISA
2017-11-29 Alec Roelkearch-riscv: Move parts of mem insts out of ISA
2017-11-29 Alec Roelkearch-riscv: Move unknown out of ISA description
2017-11-29 Alec Roelkearch-riscv: Move standard ops out of ISA
2017-11-28 Alec Roelkearch-riscv: Move static_inst into a directory
2017-11-22 Alec Roelkearch-riscv: Add missing system calls
2017-11-07 Gabe Blackalpha,arm,mips,power,riscv,sparc,x86: Merge exec decl...
2017-11-02 Gabe Blackalpha,arm,mips,power,riscv,sparc,x86,isa: De-specialize...
2017-10-17 Gabe Blackscons: Stop generating inc.d in the isa parser.
2017-10-13 Nikos Nikolerismem: Signal the local monitor when clearing the global...
2017-09-11 Gabe Blackstats: Get rid of some kernel stats related cruft.
2017-07-17 Alec Roelkeriscv: Define register index constants using literals
2017-07-14 Gabe Blackriscv: Disambiguate between the C and C++ versions...
2017-07-14 Alec Roelkeriscv: Fix bugs with RISC-V decoder and detailed CPUs
2017-07-14 Alec Roelkeriscv: Add unused attribute to some registers.hh constants
2017-07-11 Alec Roelkearch-riscv: Add support for compressed extension RV64C
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