Merge "misc: Merge branch v20.1.0.3 hotfix into develop" into develop
[gem5.git] / src / arch /
2021-02-04 Bobby R. BruceMerge "misc: Merge branch v20.1.0.3 hotfix into develop...
2021-02-04 Earl Oufastmodel: fix cntfrq in A76
2021-02-04 Alexandru Dutuarch-gcn3: Implementation of s_sleep
2021-02-04 Kyle Roartyarch-x86: Make JRCXZ instruction do 64-bit jump
2021-02-03 Bobby R. Brucemisc: Merge branch v20.1.0.3 hotfix into develop
2021-02-03 Bobby R. Brucearch-riscv,misc: Fix clang missing override errors
2021-02-03 Giacomo Travagliniarch-arm: Add destRegIdxArr arrays to TME instructions
2021-02-03 Gabe Blackmisc: Re-remove Authors lines from source files.
2021-02-03 Gabe Blackarch-arm,cpu: Use getEMI() in more places.
2021-02-03 Gabe Blackarch-arm,cpu: Introduce a getEMI virtual method on...
2021-02-03 Gabe Blackarch: Templatize the BasicDecodeCache.
2021-02-02 Adrian Herreraarch-arm: don't expose FEAT_VHE by default
2021-02-02 Gabe Blackext: Update pybind11 to version 2.6.2.
2021-02-02 Earl Oufastmodel: add interface to update system counter freq
2021-02-02 Earl Oufastmodel: create base class for EVS CPU
2021-02-02 Gabe Blackarch-power: Delete unused register related constants.
2021-02-01 Earl Oufastmodel: remove incorrect cntfrq update
2021-01-31 Gabe Blackarch-x86: Fix style in arch/x86/types.hh.
2021-01-31 Gabe Blackarch: Stop using switching header files in ISA specific...
2021-01-31 Gabe Blackarch: Correct style in the ISA base class.
2021-01-29 Gabe Blackarch-arm: Fix style in decoder.hh.
2021-01-29 Cui Jinarch-riscv: fix unintentionally CSR bit overwritten...
2021-01-28 Gabe Blackarch,base,mem,sim: Fix style in base/types.hh and remov...
2021-01-27 Tong Shenarch-x86: implement POPCNT instruction.
2021-01-27 Andreas Sandbergarch, mem, cpu, systemc: Remove Python 2.7 glue code
2021-01-27 Gabe Blackarch-x86: Delete some unused register related constants.
2021-01-27 Gabe Blackarch-mips: Delete unused register related constants.
2021-01-27 Gabe Blackarch-x86: Fix style in plain C++ StaticInst base classes.
2021-01-27 Gabe Blackarch-x86,cpu: Don't use aliases to hide TheISA::.
2021-01-26 Gabe Blackriscv: Export the system call ABI for use in gem5 ops.
2021-01-26 Gabe Blackarch-arm: Don't use TheISA in the ARM implementation.
2021-01-25 Gabe Blackarch-power: Stop "using namespace std"
2021-01-25 Giacomo Travagliniarch-arm: Add set_reg_idx_arr to SveStructMemSIMicroopD...
2021-01-24 Andreas Sandbergarch-arm, dev-arm: Consistently use ISO prefixes
2021-01-23 Gabe Blackarch-arm: Stop "using namespace std"
2021-01-23 Gabe Blackarch-sparc: Stop "using namespace std"
2021-01-23 Gabe Blackarch-mips: Stop "using namespace std"
2021-01-23 Gabe Blackarch-riscv: Stop "using namespace std"
2021-01-23 Gabe Blackarch-x86: Stop "using namespace std"
2021-01-23 Giacomo Travagliniarch-arm: Fix Compare and Swap Pair instructions
2021-01-22 Tong Shenarch-x86: implement PSHUFB SSE instruction.
2021-01-22 Andreas Sandbergarch-arm, dev-arm: Remove Python 2 compatibility code
2021-01-20 Gabe Blackriscv: Get rid of some unused constants.
2021-01-20 Gabe Blackarm: Use the "reg" ABI for gem5 ops.
2021-01-19 Gabe Blackarm: Export the mostly generic syscall ABI.
2021-01-19 Gabe Blackarch: Fix the code that computes MaxMiscDestReg.
2021-01-19 Gabe Blackarm: Use local src and dest reg index arrays.
2021-01-19 Gabe Blackarch: Wrap InstObjParams with a class and not a function.
2021-01-18 Giacomo Travagliniarch-arm: dtb_addr is already encoding the loadAddrOffset
2021-01-18 Matthew Porembaarch-gcn3,gpu-compute: Update stats style for GPU
2021-01-18 Cui Jinarch-riscv: fix incorrect interrupt checking logic
2021-01-15 Daniel R. Carvalhomisc: Fix some includes
2021-01-14 Peter Yuenarch-riscv: CSR registers support in RISC-V remote...
2021-01-13 Ciro Santilliarch-arm: inform bootloader of kernel position with...
2021-01-13 Gabe Blackmisc: Fix missing includes.
2021-01-06 Cui Jinarch-riscv: fix the wrong cause register setting
2021-01-05 Gabe Blackarch: Add a mechanism to pad the src or dest reg index...
2020-12-31 Cui Jinarch-riscv: fix MIE csr register setting bugs
2020-12-21 Gabe Blackscons,fastmodel: Change how ARM license slots are throt...
2020-12-17 Gabe Blackx86: Fix some comments in x86 KVM process initialization.
2020-12-17 Gabe Blackx86: Change some CR0 settings when setting up kvm x86...
2020-12-16 Gabe Blackarm: Fix style in the ISA templates.
2020-12-16 Gabe Blackx86: Use the right register type when initializing...
2020-12-16 Gabe Blackx86: Set the effective base of the TSS when initializin...
2020-12-16 Gabe Blackx86: Some small style fixes in arch/x86/process.hh.
2020-12-11 muptonarm,kvm: missed rename of MISCREG_HYP in kvm/armv8_cpu.cc
2020-12-06 Gabe Blackriscv: Convert RISCV to use local reg index storage.
2020-12-02 Gabe Blackx86: Let the pseudoInst dispatch function handle the...
2020-11-28 Gabe Blackpower: Convert POWER to use local reg index storage.
2020-11-26 Ciro Santilliarch-arm: add official names to all PMU events
2020-11-26 Curtis Dunhamarch-arm: Add ID_MMFR4{,EL1} system registers
2020-11-26 Bobby R. BruceMerge "misc: Merge branch hotfix v20.1.0.2 branch into...
2020-11-25 Giacomo Travagliniarch-arm: VSTCR_EL2/VSTTBR_EL2 accessible in secure...
2020-11-25 Giacomo Travagliniarch-arm: Add SECURE_RD/WR flags to miscRegInfo
2020-11-25 Ciro Santilliarch-arm: implement the aarch64 ID_ISAR6_EL1 miscregister
2020-11-24 Gabe Blackmips: Convert MIPS to use local register index storage.
2020-11-24 Gabe Blacksparc: Convert SPARC to use local register index storage.
2020-11-24 Gabe Blackx86: Convert X86 to use local reg index storage.
2020-11-24 Gabe Blackarm: Use the common pseudoInst dispatch function.
2020-11-23 Ciro Santilliarch-arm: serialize miscregs as a map
2020-11-19 Giacomo Travaglinifastmodel: Replace xrange with range to be python3...
2020-11-19 Giacomo Travaglinifastmodel: Use BaseMMU in the CortexR52 wrapper
2020-11-19 Gabe Blackarch: Add some format strings to the parser for reg...
2020-11-19 Gabe Blackx86: Fix object scope in the CPUID code.
2020-11-17 Bobby R. Brucearch-sparc,misc: Added M5_VAR_USED to SparcProcess var
2020-11-17 Kyle Roartyarch-gcn3: Explicitly sign-extend simm16
2020-11-17 Kyle Roartyarch-gcn3: Implement flat_load_sbyte instruction
2020-11-17 Kyle Roartyarch-gcn3: Implement s_setreg_imm32_b32 instruction
2020-11-17 Jordi Vaqueroarch-arm: Implementation ARMv8.1 RDMA
2020-11-17 Gabe Blackfastmodel: Wrap the PL330 DMA controller fast model.
2020-11-16 Bobby R. Brucemisc: Merge branch hotfix v20.1.0.2 branch into develop
2020-11-16 Ciro Santilliarch-arm: move serialize and unserialize definition...
2020-11-10 Boris Shingarovarch-power: Implement mcrxr
2020-11-07 Kyle Roartyarch-x86: include system syscall header in syscall...
2020-11-06 Gabe Blackarch,cpu: Enforce using accessors to get at src/destRegIdx.
2020-11-06 Kyle Roartyarch-gcn3: Fix operand size reporting for Flat insts
2020-11-04 Gabe Blackarm: Get rid of some unused instruction templates.
2020-11-04 Gabe Blackmips: Fix the build after the MMU changes.
2020-11-03 Giacomo Travagliniarch-arm: Do not use _flushMva for TLBI IPA
2020-11-03 Giacomo Travagliniarch-arm: TlbEntry flush to be considered as functional...
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