2018-07-16 |
Giacomo Travaglini | arch-arm: Introduce ARMv8.1 Virtual Timer System Registers |
tree | commitdiff |
2018-07-16 |
Giacomo Travaglini | arch-arm: Introduce RAS System Registers |
tree | commitdiff |
2018-07-09 |
Robert | arch-riscv: enable rudimentary fs simulation |
tree | commitdiff |
2018-07-09 |
Austin Harris | arch-riscv: Fix the srlw and srliw instructions. |
tree | commitdiff |
2018-06-28 |
Andreas Sandberg | arch-arm: Fix incorrect t{0,1}sz field in TTBCR |
tree | commitdiff |
2018-06-25 |
Matt Sinclair | syscall_emul: adding symlink system call |
tree | commitdiff |
2018-06-25 |
Matt Sinclair | syscall_emul: adding link system call |
tree | commitdiff |
2018-06-22 |
Giacomo Travaglini | arch-arm: AArch32 execution triggering AArch64 SW Break |
tree | commitdiff |
2018-06-22 |
Giacomo Travaglini | arch-arm: BadMode checking if corresponding EL is imple... |
tree | commitdiff |
2018-06-14 |
Tuan Ta | arch: support issuing Atomic Mem Operation (AMO) requests |
tree | commitdiff |
2018-06-14 |
Giacomo Travaglini | arch-arm: Adapting IllegalExecution fault for AArch32 |
tree | commitdiff |
2018-06-14 |
Giacomo Travaglini | arch-arm: Add Illegal Execution flag to PCState |
tree | commitdiff |
2018-06-14 |
Giacomo Travaglini | arch-arm: Read APSR in User Mode |
tree | commitdiff |
2018-06-13 |
Giacomo Travaglini | arch-arm: Fix missing Request allocation |
tree | commitdiff |
2018-06-11 |
Giacomo Travaglini | misc: Using smart pointers for memory Requests |
tree | commitdiff |
2018-06-11 |
Giacomo Travaglini | misc: Substitute pointer to Request with aliased RequestPtr |
tree | commitdiff |
2018-06-06 |
Andreas Sandberg | arch-arm: Remove dead doingStage2 variable in PT walker |
tree | commitdiff |
2018-06-06 |
Andreas Sandberg | arch-arm: Perform stage 2 lookups using the EL2 state |
tree | commitdiff |
2018-06-06 |
Andreas Sandberg | arch-arm: Respect EL from translation type |
tree | commitdiff |
2018-06-06 |
Andreas Sandberg | arch-arm: Fix page size handling when merging stage... |
tree | commitdiff |
2018-06-06 |
Andreas Sandberg | dev, arm: Add support for HYP & secure timers |
tree | commitdiff |
2018-06-06 |
Andreas Sandberg | arch-arm: Adjust breakpoint EC depending on source... |
tree | commitdiff |
2018-05-29 |
Giacomo Travaglini | arch-arm: ISA param for treating MISCREG_IMPDEF_UNIMPL... |
tree | commitdiff |
2018-05-29 |
Giacomo Travaglini | arch-arm: Remove unusued MISCREG_A64_UNIMPL |
tree | commitdiff |
2018-05-29 |
Giacomo Travaglini | arch-arm: MPIDR.MT = 1 in a multithreaded system |
tree | commitdiff |
2018-05-29 |
Giacomo Travaglini | arch-arm: S3_<op1>_<Cn>_<Cm>_<op2> are Implementation... |
tree | commitdiff |
2018-05-29 |
Giacomo Travaglini | arch-arm: Implement ARMv8.1 TTBR1_EL2 register |
tree | commitdiff |
2018-05-29 |
Giacomo Travaglini | arch-arm: Add E2H bit to HCR_EL2 System register |
tree | commitdiff |
2018-05-24 |
Gabe Black | x86: Add op classes to the MediaOps. |
tree | commitdiff |
2018-05-16 |
Andreas Sandberg | arch-arm: Fix semihosting arg count for SYS_GET_CMDLINE |
tree | commitdiff |
2018-05-16 |
Andreas Sandberg | arch-arm: Add support for semihosting STDIO redirection |
tree | commitdiff |
2018-05-12 |
Alec Roelke | arch-riscv: Update CSR implementations |
tree | commitdiff |
2018-05-08 |
Matt Sinclair | arch-x86, arch-power: fix calls to bits and insertBits |
tree | commitdiff |
2018-05-08 |
Giacomo Travaglini | arch-arm: Map ID_x_EL1 registers to AArch32 version |
tree | commitdiff |
2018-05-03 |
Tony Gutierrez | arch-x86: Enable fstatfs for x86_64 |
tree | commitdiff |
2018-05-02 |
Steve Reinhardt | arch-x86: implement movntps/movntpd SSE insts |
tree | commitdiff |
2018-05-02 |
Gabe Black | x86: Add a ld/st microop flag for marking an access... |
tree | commitdiff |
2018-05-02 |
Tony Gutierrez | arch-x86: Enable the umask system call |
tree | commitdiff |
2018-04-27 |
Giacomo Travaglini | sim,cpu,mem,arch: Introduced MasterInfo data structure |
tree | commitdiff |
2018-04-19 |
Giacomo Travaglini | arch-arm: Add ARMv8.1 TTBR1_EL2 register |
tree | commitdiff |
2018-04-19 |
Giacomo Travaglini | arch-arm: Fix Unknown Instruction disassemble |
tree | commitdiff |
2018-04-19 |
Giacomo Travaglini | arch-arm: Change disassemble when MSR to UNKNOWN register |
tree | commitdiff |
2018-04-18 |
Chuan Zhu | arch-arm: Fix masking in CPACR_EL1 |
tree | commitdiff |
2018-04-18 |
Chuan Zhu | arch-arm: Mask out unsupported trapped exception handli... |
tree | commitdiff |
2018-04-18 |
Chuan Zhu | arch-arm: Fix FPEXC32_EL2 to FPEXC mapping |
tree | commitdiff |
2018-04-18 |
Giacomo Travaglini | arch-arm: Adding MiscReg Priv (EL1) global flag |
tree | commitdiff |
2018-04-18 |
Chuan Zhu | arch-arm: Correct masking of cp10 and cp11 in CPACR |
tree | commitdiff |
2018-04-18 |
Giacomo Travaglini | arch-arm: Using explicit invalidation in TLB |
tree | commitdiff |
2018-04-17 |
Giacomo Travaglini | arch-arm: Fix secure MiscReg access when EL3 is not... |
tree | commitdiff |
2018-04-10 |
Giacomo Travaglini | arch-arm: Fix mrc,mcr to cop14 disassemble |
tree | commitdiff |
2018-04-06 |
Gabe Black | arch: alpha: Fix an 8 year old bug from the transition... |
tree | commitdiff |
2018-04-06 |
Giacomo Travaglini | arch-arm: Add support for Tarmac trace generation |
tree | commitdiff |
2018-04-06 |
Giacomo Travaglini | arch-arm: Add support for Tarmac trace-based simulation |
tree | commitdiff |
2018-04-06 |
Giacomo Travaglini | arch-arm: Fix AArch32 branch instructions disassemble |
tree | commitdiff |
2018-04-06 |
Giacomo Travaglini | arch-arm: Fix secure write of SCTLR when EL3 is AArch64 |
tree | commitdiff |
2018-04-06 |
Giacomo Travaglini | arch-arm: Correct mcrr,mrrc disassemble |
tree | commitdiff |
2018-03-27 |
Gabe Black | arch: cpu: Make the ExtMachInst type a template argumen... |
tree | commitdiff |
2018-03-27 |
Gabe Black | sparc: Add some missing M5_FALLTHROUGHs and breaks. |
tree | commitdiff |
2018-03-26 |
Gabe Black | arch: Fix all override related warnings. |
tree | commitdiff |
2018-03-26 |
Gabe Black | arch: Add a virtual asBytes function to the StaticInst... |
tree | commitdiff |
2018-03-23 |
Giacomo Travaglini | arch-arm: Distinguish IS TLBI from non-IS |
tree | commitdiff |
2018-03-23 |
Giacomo Travaglini | arch-arm: Created function for TLB ASID Invalidation |
tree | commitdiff |
2018-03-20 |
Chun-Chen Hsu | arch, arm: Fix implicit-fallthrough GCC warnings |
tree | commitdiff |
2018-03-20 |
Tuan Ta | riscv: throw IllegalInstFault when decoding invalid... |
tree | commitdiff |
2018-03-15 |
Siddhesh Poyarekar | arm: Fix implicit-fallthrough warnings when building... |
tree | commitdiff |
2018-03-15 |
Jason Lowe-Power | arch-x86,sim-se: Enable prlimit syscall |
tree | commitdiff |
2018-03-15 |
Jason Lowe-Power | arch-x86,sim-se: Bump kernel version to 3.2 |
tree | commitdiff |
2018-03-15 |
Nikos Nikoleris | arch-arm: Fix unused variable warning in faults.cc |
tree | commitdiff |
2018-03-15 |
Gabe Black | x86: Add bitfields which can gather/scatter bases and... |
tree | commitdiff |
2018-03-14 |
Gabe Black | x86: Simplify the implementations of RDTSC and RDTSCP... |
tree | commitdiff |
2018-03-14 |
Gabe Black | x86: Implement the RDTSCP instruction. |
tree | commitdiff |
2018-03-14 |
Gabe Black | x86: Mark the RDTSC instruction as .serialize_before. |
tree | commitdiff |
2018-03-14 |
Gabe Black | x86: Replace the .serializing directive with .serialize... |
tree | commitdiff |
2018-03-14 |
Chun-Chen Hsu | arm: Fix maybe-uninitialized GCC warnings |
tree | commitdiff |
2018-03-14 |
Giacomo Travaglini | arch-arm: ERET from AArch64 to AArch32 ignore MSBs |
tree | commitdiff |
2018-03-12 |
Giacomo Travaglini | arch-arm: Adding IPA-Based Invalidating instructions |
tree | commitdiff |
2018-03-12 |
Giacomo Travaglini | arch-arm: Implement missing aarch32 TLBI registers |
tree | commitdiff |
2018-03-08 |
Gabe Black | sparc: Passify a new g++ warning. |
tree | commitdiff |
2018-03-08 |
Giacomo Travaglini | arch-arm: Enable Debug IFSC when faulting to aarch64... |
tree | commitdiff |
2018-03-08 |
Giacomo Travaglini | arch-arm: Fix FSC generation in AbortFault |
tree | commitdiff |
2018-03-08 |
Giacomo Travaglini | arch-arm: Introduce update method in ArmFault class |
tree | commitdiff |
2018-03-08 |
Giacomo Travaglini | arch-arm: Fix PCAlignmentFault routing to Hypervisor |
tree | commitdiff |
2018-03-06 |
Gabe Black | scons: Switch from the print statement to the print... |
tree | commitdiff |
2018-03-06 |
Siddhesh Poyarekar | arm: Remove ignored const qualifier |
tree | commitdiff |
2018-02-24 |
Khalique | sparc: Fix FS Checkpoint loading |
tree | commitdiff |
2018-02-20 |
Giacomo Travaglini | arch-arm: Make hlt64 a mem barrier with semihosting |
tree | commitdiff |
2018-02-20 |
Giacomo Travaglini | arch-arm: Add AArch32 HLT Semihosting interface |
tree | commitdiff |
2018-02-20 |
Giacomo Travaglini | arch-arm: Add AArch32 SVC Semihosting interface |
tree | commitdiff |
2018-02-20 |
Giacomo Travaglini | arch-arm: Adding isa templates for semihosting ops |
tree | commitdiff |
2018-02-20 |
Giacomo Travaglini | arch-arm: HLT using immediate when checking for semihosting |
tree | commitdiff |
2018-02-20 |
Giacomo Travaglini | arch-arm: Fix Hlt64,Svc64,Hvc64,Smc64,Brk64 disassembly |
tree | commitdiff |
2018-02-19 |
Alec Roelke | arch-riscv: Fix compressed branch op offset |
tree | commitdiff |
2018-02-19 |
Giacomo Travaglini | arch-arm: Semihosting not available in syscall emulation |
tree | commitdiff |
2018-02-19 |
Andreas Sandberg | arch-arm: Add support for secure state in semihosting |
tree | commitdiff |
2018-02-19 |
Andreas Sandberg | arch-arm: Add aarch64 semihosting support |
tree | commitdiff |
2018-02-16 |
Giacomo Travaglini | arch-arm: IMPLEMENTATION DEFINED register |
tree | commitdiff |
2018-02-16 |
Giacomo Travaglini | arch-arm: Arch regs and pseudo regs distinction |
tree | commitdiff |
2018-02-16 |
Chuan Zhu | arch-arm: Fix syntax error in TLB::getResultTe |
tree | commitdiff |
2018-02-16 |
Chuan Zhu | arch-arm: Fix big endian support in {Load,Store}Double64 |
tree | commitdiff |
2018-02-16 |
Chuan Zhu | arch-arm: Fix big endian support in do{Long,L1,L2}Descr... |
tree | commitdiff |
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