2018-10-12 |
Gabe Black | arch: Explicitly specify the endianness in the generic... |
tree | commitdiff |
2018-10-12 |
Gabe Black | mips: Use little endian packet accessors. |
tree | commitdiff |
2018-10-12 |
Gabe Black | sparc: Use big endian packet accessors. |
tree | commitdiff |
2018-10-12 |
Gabe Black | x86: Use little endian packet accessors. |
tree | commitdiff |
2018-10-12 |
Ciro Santilli | syscall_emul: update arm uname release to 3.7.0+ |
tree | commitdiff |
2018-10-09 |
Giacomo Travaglini | arch-arm: Add have_crypto System parameter |
tree | commitdiff |
2018-10-09 |
Giacomo Travaglini | arch-arm: AArch64 Crypto AES |
tree | commitdiff |
2018-10-09 |
Giacomo Travaglini | arch-arm: AArch64 Crypto SHA |
tree | commitdiff |
2018-10-09 |
Matt Horsnell | arch-arm: AArch32 Crypto AES |
tree | commitdiff |
2018-10-09 |
Matt Horsnell | arch-arm: AArch32 Crypto SHA |
tree | commitdiff |
2018-10-08 |
Ciro Santilli | dev, arm: remove the RealViewEB platform |
tree | commitdiff |
2018-10-08 |
Matteo Andreozzi | arch-arm: Mark ArmProcess method as override |
tree | commitdiff |
2018-10-02 |
Giacomo Travaglini | sim-se: Set ArmProcess64 hwcaps depending on ID regs |
tree | commitdiff |
2018-10-02 |
Giacomo Travaglini | sim-se: Different HWCAP for ArmProcess32/64 |
tree | commitdiff |
2018-10-02 |
Edmund Grimley Evans | arch-arm: Add FP16 support introduced by Armv8.2-A |
tree | commitdiff |
2018-10-02 |
Gabor Dozsa | arch: Fix unserialization of VectorReg value |
tree | commitdiff |
2018-10-02 |
Edmund Grimley Evans | arch-arm: Add FP16 support and other primitives to... |
tree | commitdiff |
2018-10-01 |
Giacomo Travaglini | arch-arm: Implement AArch64 ID regs as bitunions |
tree | commitdiff |
2018-10-01 |
Giacomo Travaglini | arch-arm: Implement AArch64 ID_AA64MMFR2_EL1 register |
tree | commitdiff |
2018-10-01 |
Giacomo Travaglini | arch-arm: Move MiscReg BitUnions into a separate header... |
tree | commitdiff |
2018-10-01 |
Giacomo Travaglini | arch-arm: Init AArch64 ID registers in SE mode |
tree | commitdiff |
2018-09-28 |
Giacomo Travaglini | arch-arm: raise/clear IRQ when writing to PMOVSCLR/SET |
tree | commitdiff |
2018-09-19 |
Brandon Potter | syscall_emul: implement dir-related syscalls |
tree | commitdiff |
2018-09-19 |
Brandon Potter | syscall_emul: expand AuxVector class |
tree | commitdiff |
2018-09-13 |
Earl Ou | Fix SConstruct for asan build |
tree | commitdiff |
2018-09-13 |
Anouk Van Laer | arch-arm: Correction for address size in EL1&0 translation |
tree | commitdiff |
2018-09-13 |
Anouk Van Laer | arch-arm: Correction to address size in EL2/EL3 |
tree | commitdiff |
2018-09-12 |
Ciro Santilli | dev-arm: rename Pl390 to GicV2 |
tree | commitdiff |
2018-09-10 |
Giacomo Travaglini | dev-arm: Factory SimObject for generating ArmInterruptPin |
tree | commitdiff |
2018-09-10 |
Andreas Sandberg | arm: Use the interrupt adaptor in the PMU |
tree | commitdiff |
2018-09-10 |
Andreas Sandberg | arm: Add support for tracking TCs in ISA devices |
tree | commitdiff |
2018-08-21 |
Jason Lowe-Power | misc: Appease GCC 8 |
tree | commitdiff |
2018-08-10 |
Giacomo Gabrielli | arm: Add support for RCpc load-acquire instructions... |
tree | commitdiff |
2018-08-02 |
Andreas Sandberg | arch-arm: Don't fail to initialise PMU if BP is missing |
tree | commitdiff |
2018-07-28 |
Alec Roelke | arch-riscv: Add xret instructions |
tree | commitdiff |
2018-07-28 |
Alec Roelke | arch-riscv: Add support for trap value register |
tree | commitdiff |
2018-07-28 |
Alec Roelke | arch-riscv: Add support for fault handling |
tree | commitdiff |
2018-07-16 |
Giacomo Travaglini | arch-arm: Introduce ARMv8.1 Virtual Timer System Registers |
tree | commitdiff |
2018-07-16 |
Giacomo Travaglini | arch-arm: Introduce RAS System Registers |
tree | commitdiff |
2018-07-09 |
Robert | arch-riscv: enable rudimentary fs simulation |
tree | commitdiff |
2018-07-09 |
Austin Harris | arch-riscv: Fix the srlw and srliw instructions. |
tree | commitdiff |
2018-06-28 |
Andreas Sandberg | arch-arm: Fix incorrect t{0,1}sz field in TTBCR |
tree | commitdiff |
2018-06-25 |
Matt Sinclair | syscall_emul: adding symlink system call |
tree | commitdiff |
2018-06-25 |
Matt Sinclair | syscall_emul: adding link system call |
tree | commitdiff |
2018-06-22 |
Giacomo Travaglini | arch-arm: AArch32 execution triggering AArch64 SW Break |
tree | commitdiff |
2018-06-22 |
Giacomo Travaglini | arch-arm: BadMode checking if corresponding EL is imple... |
tree | commitdiff |
2018-06-14 |
Tuan Ta | arch: support issuing Atomic Mem Operation (AMO) requests |
tree | commitdiff |
2018-06-14 |
Giacomo Travaglini | arch-arm: Adapting IllegalExecution fault for AArch32 |
tree | commitdiff |
2018-06-14 |
Giacomo Travaglini | arch-arm: Add Illegal Execution flag to PCState |
tree | commitdiff |
2018-06-14 |
Giacomo Travaglini | arch-arm: Read APSR in User Mode |
tree | commitdiff |
2018-06-13 |
Giacomo Travaglini | arch-arm: Fix missing Request allocation |
tree | commitdiff |
2018-06-11 |
Giacomo Travaglini | misc: Using smart pointers for memory Requests |
tree | commitdiff |
2018-06-11 |
Giacomo Travaglini | misc: Substitute pointer to Request with aliased RequestPtr |
tree | commitdiff |
2018-06-06 |
Andreas Sandberg | arch-arm: Remove dead doingStage2 variable in PT walker |
tree | commitdiff |
2018-06-06 |
Andreas Sandberg | arch-arm: Perform stage 2 lookups using the EL2 state |
tree | commitdiff |
2018-06-06 |
Andreas Sandberg | arch-arm: Respect EL from translation type |
tree | commitdiff |
2018-06-06 |
Andreas Sandberg | arch-arm: Fix page size handling when merging stage... |
tree | commitdiff |
2018-06-06 |
Andreas Sandberg | dev, arm: Add support for HYP & secure timers |
tree | commitdiff |
2018-06-06 |
Andreas Sandberg | arch-arm: Adjust breakpoint EC depending on source... |
tree | commitdiff |
2018-05-29 |
Giacomo Travaglini | arch-arm: ISA param for treating MISCREG_IMPDEF_UNIMPL... |
tree | commitdiff |
2018-05-29 |
Giacomo Travaglini | arch-arm: Remove unusued MISCREG_A64_UNIMPL |
tree | commitdiff |
2018-05-29 |
Giacomo Travaglini | arch-arm: MPIDR.MT = 1 in a multithreaded system |
tree | commitdiff |
2018-05-29 |
Giacomo Travaglini | arch-arm: S3_<op1>_<Cn>_<Cm>_<op2> are Implementation... |
tree | commitdiff |
2018-05-29 |
Giacomo Travaglini | arch-arm: Implement ARMv8.1 TTBR1_EL2 register |
tree | commitdiff |
2018-05-29 |
Giacomo Travaglini | arch-arm: Add E2H bit to HCR_EL2 System register |
tree | commitdiff |
2018-05-24 |
Gabe Black | x86: Add op classes to the MediaOps. |
tree | commitdiff |
2018-05-16 |
Andreas Sandberg | arch-arm: Fix semihosting arg count for SYS_GET_CMDLINE |
tree | commitdiff |
2018-05-16 |
Andreas Sandberg | arch-arm: Add support for semihosting STDIO redirection |
tree | commitdiff |
2018-05-12 |
Alec Roelke | arch-riscv: Update CSR implementations |
tree | commitdiff |
2018-05-08 |
Matt Sinclair | arch-x86, arch-power: fix calls to bits and insertBits |
tree | commitdiff |
2018-05-08 |
Giacomo Travaglini | arch-arm: Map ID_x_EL1 registers to AArch32 version |
tree | commitdiff |
2018-05-03 |
Tony Gutierrez | arch-x86: Enable fstatfs for x86_64 |
tree | commitdiff |
2018-05-02 |
Steve Reinhardt | arch-x86: implement movntps/movntpd SSE insts |
tree | commitdiff |
2018-05-02 |
Gabe Black | x86: Add a ld/st microop flag for marking an access... |
tree | commitdiff |
2018-05-02 |
Tony Gutierrez | arch-x86: Enable the umask system call |
tree | commitdiff |
2018-04-27 |
Giacomo Travaglini | sim,cpu,mem,arch: Introduced MasterInfo data structure |
tree | commitdiff |
2018-04-19 |
Giacomo Travaglini | arch-arm: Add ARMv8.1 TTBR1_EL2 register |
tree | commitdiff |
2018-04-19 |
Giacomo Travaglini | arch-arm: Fix Unknown Instruction disassemble |
tree | commitdiff |
2018-04-19 |
Giacomo Travaglini | arch-arm: Change disassemble when MSR to UNKNOWN register |
tree | commitdiff |
2018-04-18 |
Chuan Zhu | arch-arm: Fix masking in CPACR_EL1 |
tree | commitdiff |
2018-04-18 |
Chuan Zhu | arch-arm: Mask out unsupported trapped exception handli... |
tree | commitdiff |
2018-04-18 |
Chuan Zhu | arch-arm: Fix FPEXC32_EL2 to FPEXC mapping |
tree | commitdiff |
2018-04-18 |
Giacomo Travaglini | arch-arm: Adding MiscReg Priv (EL1) global flag |
tree | commitdiff |
2018-04-18 |
Chuan Zhu | arch-arm: Correct masking of cp10 and cp11 in CPACR |
tree | commitdiff |
2018-04-18 |
Giacomo Travaglini | arch-arm: Using explicit invalidation in TLB |
tree | commitdiff |
2018-04-17 |
Giacomo Travaglini | arch-arm: Fix secure MiscReg access when EL3 is not... |
tree | commitdiff |
2018-04-10 |
Giacomo Travaglini | arch-arm: Fix mrc,mcr to cop14 disassemble |
tree | commitdiff |
2018-04-06 |
Gabe Black | arch: alpha: Fix an 8 year old bug from the transition... |
tree | commitdiff |
2018-04-06 |
Giacomo Travaglini | arch-arm: Add support for Tarmac trace generation |
tree | commitdiff |
2018-04-06 |
Giacomo Travaglini | arch-arm: Add support for Tarmac trace-based simulation |
tree | commitdiff |
2018-04-06 |
Giacomo Travaglini | arch-arm: Fix AArch32 branch instructions disassemble |
tree | commitdiff |
2018-04-06 |
Giacomo Travaglini | arch-arm: Fix secure write of SCTLR when EL3 is AArch64 |
tree | commitdiff |
2018-04-06 |
Giacomo Travaglini | arch-arm: Correct mcrr,mrrc disassemble |
tree | commitdiff |
2018-03-27 |
Gabe Black | arch: cpu: Make the ExtMachInst type a template argumen... |
tree | commitdiff |
2018-03-27 |
Gabe Black | sparc: Add some missing M5_FALLTHROUGHs and breaks. |
tree | commitdiff |
2018-03-26 |
Gabe Black | arch: Fix all override related warnings. |
tree | commitdiff |
2018-03-26 |
Gabe Black | arch: Add a virtual asBytes function to the StaticInst... |
tree | commitdiff |
2018-03-23 |
Giacomo Travaglini | arch-arm: Distinguish IS TLBI from non-IS |
tree | commitdiff |
2018-03-23 |
Giacomo Travaglini | arch-arm: Created function for TLB ASID Invalidation |
tree | commitdiff |
2018-03-20 |
Chun-Chen Hsu | arch, arm: Fix implicit-fallthrough GCC warnings |
tree | commitdiff |
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