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scons: Group Source-s based on what SConscript included them.
[gem5.git] / src / cpu / BaseCPU.py
2015-07-20 Brandon Pottersyscall_emul: [patch 13/22] add system call retry capab... blob | commitdiff | raw
2016-11-30 Alec Roelkearch: [Patch 1/5] Added RISC-V base instruction set... blob | commitdiff | raw | diff to current
2016-04-05 Geoffrey Blakecpu: Query CPU for inst executed from Python blob | commitdiff | raw | diff to current
2015-09-30 Mitch Hayengaisa,cpu: Add support for FS SMT Interrupts blob | commitdiff | raw | diff to current
2015-03-02 Andreas Hanssonmem: Move crossbar default latencies to subclasses blob | commitdiff | raw | diff to current
2015-03-02 Andreas Hanssonarm: Share a port for the two table walker objects blob | commitdiff | raw | diff to current
2015-01-25 Ali Saidicpu: Put all CPU instruction tracers in a single file blob | commitdiff | raw | diff to current
2014-09-20 Andreas Hanssonmem: Rename Bus to XBar to better reflect its behaviour blob | commitdiff | raw | diff to current
2014-05-09 Akash Bagdiacpu, arm: Allow the specification of a socket field blob | commitdiff | raw | diff to current
2014-01-24 ARM gem5 Developersarm: Add support for ARMv8 (AArch64 & AArch32) blob | commitdiff | raw | diff to current
2013-09-04 Andreas Hanssoncpu: Move the branch predictor out of the BaseCPU blob | commitdiff | raw | diff to current
2013-06-27 Akash Bagdiasim: Add the notion of clock domains to all ClockedObjects blob | commitdiff | raw | diff to current
2013-06-27 Akash Bagdiaconfig: Remove redundant explicit setting of default... blob | commitdiff | raw | diff to current
2013-06-11 Andreas Sandbergcpu: Add support for scheduling multiple inst/load... blob | commitdiff | raw | diff to current
2013-04-22 Timothy M. Jonescpu: Let python scripts obtain the number of instructio... blob | commitdiff | raw | diff to current
2013-04-22 Dam Sunwoocpu: generate SimPoint basic block vector profiles blob | commitdiff | raw | diff to current
2013-02-19 Andreas Hanssonx86: Move APIC clock divider to Python blob | commitdiff | raw | diff to current
2013-02-15 Andreas Sandbergcpu: Add CPU metadata om the Python classes blob | commitdiff | raw | diff to current
2013-01-24 Nilay Vaish ext... branch predictor: move out of o3 and inorder cpus blob | commitdiff | raw | diff to current
2013-01-07 Andreas Sandbergcpu: Flush TLBs on switchOut() blob | commitdiff | raw | diff to current
2013-01-07 Andreas Sandbergcpu: Rename defer_registration->switched_out blob | commitdiff | raw | diff to current
2013-01-07 Andreas Sandbergcpu: Introduce sanity checks when switching between... blob | commitdiff | raw | diff to current
2013-01-07 Andreas Sandbergarch: Make the ISA class inherit from SimObject blob | commitdiff | raw | diff to current
2012-11-02 Andreas Sandbergsim: Include object header files in SWIG interfaces blob | commitdiff | raw | diff to current
2012-10-15 Andreas HanssonRegression: Use CPU clock and 32-byte width for L1... blob | commitdiff | raw | diff to current
2012-09-25 Andreas Sandbergsim: Move CPU-specific methods from SimObject to the... blob | commitdiff | raw | diff to current
2012-08-28 Andreas HanssonClock: Add a Cycles wrapper class and use where applicable blob | commitdiff | raw | diff to current
2012-08-21 Andreas HanssonCPU: Remove overloaded function_trace_start parameter blob | commitdiff | raw | diff to current
2012-08-21 Andreas HanssonClock: Move the clock and related functions to ClockedO... blob | commitdiff | raw | diff to current
2012-05-31 Andreas HanssonBus: Split the bus into a non-coherent and coherent bus blob | commitdiff | raw | diff to current
2012-03-09 Geoffrey BlakeCheckerCPU: Make CheckerCPU runtime selectable instead... blob | commitdiff | raw | diff to current
2012-03-01 Nilay Vaishx86: Fix switching of CPUs blob | commitdiff | raw | diff to current
2012-02-13 Andreas HanssonMEM: Introduce the master/slave port roles in the Pytho... blob | commitdiff | raw | diff to current
2012-02-01 Gabe BlackMerge ... head, hopefully the last time for this batch. blob | commitdiff | raw | diff to current
2012-01-31 Geoffrey BlakeCheckerCPU: Re-factor CheckerCPU to be compatible with... blob | commitdiff | raw | diff to current
2012-01-31 Gabe BlackMerge with main repository. blob | commitdiff | raw | diff to current
2012-01-29 Gabe BlackYet another merge with the main repository. blob | commitdiff | raw | diff to current
2012-01-28 Gabe BlackMerge with the main repo. blob | commitdiff | raw | diff to current
2012-01-16 Gabe BlackMerge yet again with the main repository. blob | commitdiff | raw | diff to current
2012-01-17 Andreas HanssonCPU: Moving towards a more general port across CPU... blob | commitdiff | raw | diff to current
2012-01-07 Gabe BlackAnother merge with the main repository. blob | commitdiff | raw | diff to current
2012-01-07 Gabe BlackMerge with the main repository again. blob | commitdiff | raw | diff to current
2012-01-07 Gabe BlackMerge with main repository. blob | commitdiff | raw | diff to current
2011-12-01 Ali SaidiARM: Add support for having a TLB cache. blob | commitdiff | raw | diff to current
2011-11-18 Gabe BlackSE/FS: Get rid of FULL_SYSTEM in the CPU directory. blob | commitdiff | raw | diff to current
2011-11-02 Gabe BlackSE/FS: Get rid of FULL_SYSTEM in sim. blob | commitdiff | raw | diff to current
2011-10-16 Gabe BlackARM: Turn on the page table walker on ARM in SE mode. blob | commitdiff | raw | diff to current
2011-10-13 Gabe BlackX86: Turn on the page table walker in SE mode. blob | commitdiff | raw | diff to current
2011-10-09 Gabe BlackSE/FS: Build the Interrupt objects in SE mode. blob | commitdiff | raw | diff to current
2011-03-26 Korey Sewellmips: cleanup ISA-specific code blob | commitdiff | raw | diff to current
2011-02-07 Joel Hestnessmcpat: Adds McPAT performance counters blob | commitdiff | raw | diff to current
2011-02-04 Gabe BlackConfig: Keep track of uncached and cached ports separately. blob | commitdiff | raw | diff to current
2011-02-02 Gabe BlackX86: Add L1 caches for the TLB walkers. blob | commitdiff | raw | diff to current
2010-11-23 Gabe BlackX86: Loosen an assert for x86 and connect the APIC... blob | commitdiff | raw | diff to current
2010-06-02 Ali SaidiARM: Implement the ARM TLB/Tablewalker. Needs performan... blob | commitdiff | raw | diff to current
2010-01-19 Derek Howermerge blob | commitdiff | raw | diff to current
2009-10-27 Timothy M. JonesPOWER: Add support for the Power ISA blob | commitdiff | raw | diff to current
2009-09-22 Nathan Binkertpython: Move more code into m5.util allow SCons to... blob | commitdiff | raw | diff to current
2009-04-21 Nathan BinkertAutomated merge with ssh://m5sim.org//repo/m5 blob | commitdiff | raw | diff to current
2009-04-21 Nathan Binkertarm: Unify the ARM tlb. We forgot about this when... blob | commitdiff | raw | diff to current
2009-04-09 Nathan Binkerttlb: More fixing of unified TLB blob | commitdiff | raw | diff to current
2009-04-09 Gabe Blacktlb: Don't separate the TLB classes into an instruction... blob | commitdiff | raw | diff to current
2009-04-06 Gabe BlackMerge ARM into the head. ARM will compile but may not... blob | commitdiff | raw | diff to current
2009-01-31 Ali SaidiConfig: Cause a fatal() when a parameter without a... blob | commitdiff | raw | diff to current
2008-12-17 Steve ReinhardtMake Alpha pseudo-insts available from SE mode. blob | commitdiff | raw | diff to current
2008-11-03 Lisa Hsumake BaseCPU the provider of _cpuId, and cpuId() instea... blob | commitdiff | raw | diff to current
2008-10-12 Gabe BlackX86: Fix the ordering of special physical address ranges. blob | commitdiff | raw | diff to current
2008-10-12 Gabe BlackX86: Make APICs communicate through the memory system. blob | commitdiff | raw | diff to current
2008-10-12 Gabe BlackX86: Make the local APIC accessible through the memory... blob | commitdiff | raw | diff to current
2008-10-12 Gabe BlackTurn Interrupts objects into SimObjects. Also, move... blob | commitdiff | raw | diff to current
2008-08-11 Nathan Binkertparams: Convert the CPU objects to use the auto generat... blob | commitdiff | raw | diff to current
2008-02-11 Steve ReinhardtAutomated merge with file:/home/stever/hg/m5-orig blob | commitdiff | raw | diff to current
2008-02-06 Stephen HinesAdd base ARM code to M5 blob | commitdiff | raw | diff to current
2007-11-21 Gabe Blackimported patch pagewalker.patch blob | commitdiff | raw | diff to current
2007-11-15 Korey Sewellmerge Ali's config change... blob | commitdiff | raw | diff to current
2007-11-15 Korey Sewellbranch merge blob | commitdiff | raw | diff to current
2007-11-13 Korey SewellAdd in files from merge-bare-iron, get them compiling... blob | commitdiff | raw | diff to current
2007-11-13 Gabe BlackX86: Separate out the page table walker into it's own... blob | commitdiff | raw | diff to current
2007-11-12 Gabe BlackX86: Work on the page table walker, TLB, and related... blob | commitdiff | raw | diff to current
2007-11-12 Gabe BlackX86: Implement a page table walker. blob | commitdiff | raw | diff to current
2007-08-28 Gabe BlackMerge with head. blob | commitdiff | raw | diff to current
2007-08-27 Gabe BlackAddress Translation: Make SE mode use an actual TLB... blob | commitdiff | raw | diff to current
2007-08-14 Ali SaidiMerge IGNORE_STYLE change and my change. blob | commitdiff | raw | diff to current
2007-08-12 Nathan Binkertmerge blob | commitdiff | raw | diff to current
2007-08-08 Vincentius RobbyAdded fastmem option. blob | commitdiff | raw | diff to current
2007-07-29 Steve ReinhardtMerge Gabe's changes from head. blob | commitdiff | raw | diff to current
2007-07-29 Gabe BlackMerge ... head. style.py was also missing an argument... blob | commitdiff | raw | diff to current
2007-07-29 Gabe BlackMerge with head. blob | commitdiff | raw | diff to current
2007-07-29 Gabe BlackTurn the instruction tracing code into pluggable sim... blob | commitdiff | raw | diff to current
2007-06-20 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem blob | commitdiff | raw | diff to current
2007-05-31 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem blob | commitdiff | raw | diff to current
2007-05-28 Steve ReinhardtMerge vm1.(none):/home/stever/bk/newmem-head blob | commitdiff | raw | diff to current
2007-05-28 Nathan BinkertMove SimObject python files alongside the C++ and fix blob | commitdiff | raw | diff to current