arch, cpu, dev, gpu, mem, sim, python: start using getPort.
[gem5.git] / src / cpu / base.cc
2019-03-19 Gabe Blackarch, cpu, dev, gpu, mem, sim, python: start using...
2019-03-01 Andrea Mondellimem-cache: alias to mem::getMasterPort in TLB class
2019-02-08 Tuan Tacpu: support atomic memory request type with AtomicOpFu...
2018-06-21 Giacomo Travaglinicpu: Fix bug introduced by RequestPtr type change
2018-06-11 Giacomo Travaglinimisc: Using smart pointers for memory Requests
2018-04-27 Giacomo Travaglinisim,cpu,mem,arch: Introduced MasterInfo data structure
2017-12-22 Gabe Blackarch,cpu: "virtualize" the TLB interface.
2017-12-04 Gabe Blackmisc: Rename misc.(hh|cc) to logging.(hh|cc)
2017-11-21 Jose Marinhocpu, cpu, sim: move Cycle probe update
2017-11-20 Jose Marinhocpu: Make automatic transition to OFF optional
2017-11-20 Anouk Van Laerpwr: Adds logic to enter power gating for the cpu model
2017-07-12 Sean Wilsoncpu: Refactor some Event subclasses to lambdas
2017-07-12 Jose Marinhocpu, sim: Add param to force CPUs to wait for GDB
2017-06-20 Sean Wilsoncpu, gpu-compute: Replace EventWrapper use with EventFu...
2015-07-20 Brandon Pottersyscall_emul: [patch 13/22] add system call retry capab...
2016-11-09 Brandon Potterstyle: [patch 1/22] use /r/3648/ to reorganize includes
2016-06-06 David Guillen Fandospwr: Low-power idle power state for idle CPUs
2016-06-06 Stephan Diestelhorstsim: Call regStats of base-class as well
2016-04-06 Andreas SandbergRevert power patch sets with unexpected interactions
2014-12-09 Akash Bagdiapower: Low-power idle power state for idle CPUs
2016-04-05 Geoffrey Blakecpu: Query CPU for inst executed from Python
2015-11-27 Andreas Sandbergbase: Add support for changing output directories
2016-02-07 Steve Reinhardtstyle: eliminate explicit boolean comparisons
2016-02-07 Steve Reinhardtstyle: fix missing spaces in control statements
2015-11-20 Andreas Sandbergcpu: Enforce 1 interrupt controller per thread
2015-09-30 Mitch Hayengaisa,cpu: Add support for FS SMT Interrupts
2015-09-30 Mitch Hayengacpu: Add per-thread monitors
2015-09-30 Mitch Hayengacpu: Change thread assignments for heterogenous SMT
2015-08-21 Andreas Hanssoncpu: Move invldPid constant from Request to BaseCPU
2015-07-07 Andreas Sandbergsim: Refactor the serialization base class
2015-04-14 Malek Muslehconfig, cpu: fix progress interval for switched CPUs
2015-01-10 Nikos Nikoleriscpu: fix RetiredStores probe point
2014-11-14 Andreas Hanssonarm: Fixes based on UBSan and static analysis
2014-11-06 Marc Orrx86 isa: This patch attempts an implementation at mwait.
2014-10-16 Andreas Sandbergcpu: Probe points for basic PMU stats
2014-05-09 Geoffrey Blakearch, arm: Preserve TLB bootUncacheability when switchi...
2014-05-09 Akash Bagdiacpu, arm: Allow the specification of a socket field
2013-11-25 Steve Reinhardt... sim: simulate with multiple threads and event queues
2013-07-18 Andreas Hanssonmem: Set the cache line size on a system level
2013-06-11 Andreas Sandbergcpu: Add support for scheduling multiple inst/load...
2013-04-22 Dam Sunwoocpu: generate SimPoint basic block vector profiles
2013-03-26 Andreas Hanssoncpu: Remove CpuPort and use MasterPort in the CPU classes
2013-02-15 Andreas Sandbergcpu: Refactor memory system checks
2013-01-07 Andreas Sandbergcpu: Unify the serialization code for all of the CPU...
2013-01-07 Andreas Sandbergcpu: Flush TLBs on switchOut()
2013-01-07 Andreas Sandbergcpu: Rename defer_registration->switched_out
2013-01-07 Andreas Sandbergcpu: Introduce sanity checks when switching between...
2013-01-07 Andreas Sandbergarch: Make the ISA class inherit from SimObject
2012-11-02 Dam SunwooARM: dump stats and process info on context switches
2012-10-15 Andreas HanssonPort: Add protocol-agnostic ports in the port hierarchy
2012-09-13 Joel HestnessBase CPU: Initialize profileEvent to NULL
2012-08-28 Andreas HanssonClock: Rework clocks to avoid tick-to-cycle transformations
2012-08-28 Andreas HanssonPort: Stricter port bind/unbind semantics
2012-08-21 Andreas HanssonClock: Move the clock and related functions to ClockedO...
2012-08-15 Anthony GutierrezO3,ARM: fix some problems with drain/switchout function...
2012-07-09 Andreas HanssonFix: Address a few benign memory leaks
2012-05-01 Andreas HanssonMEM: Separate requests and responses for timing accesses
2012-04-14 Andreas HanssonMEM: Separate snoops and normal memory requests/responses
2012-03-30 William WangMEM: Introduce the master/slave port sub-classes in C++
2012-03-09 Geoffrey BlakeCheckerCPU: Make CheckerCPU runtime selectable instead...
2012-03-02 Andreas HanssonCPU: Check that the interrupt controller is created...
2012-02-24 Andreas HanssonCPU: Round-two unifying instr/data CPU ports across...
2012-02-12 Anthony Gutierrezcpu: add separate stats for insts/ops both globally...
2012-02-12 Ali Saidimem: Add a master ID to each request object.
2012-02-01 Gabe BlackMerge ... head, hopefully the last time for this batch.
2012-01-31 Koan-Sin Tanclang: Enable compiling gem5 using clang 2.9 and 3.0
2012-01-31 Geoffrey BlakeCheckerCPU: Re-factor CheckerCPU to be compatible with...
2012-01-31 Gabe BlackMerge with main repository.
2012-01-29 Gabe BlackYet another merge with the main repository.
2012-01-28 Gabe BlackMerge with the main repo.
2012-01-16 Gabe BlackMerge yet again with the main repository.
2012-01-17 Andreas HanssonMEM: Separate queries for snooping and address ranges
2012-01-17 Andreas HanssonCPU: Moving towards a more general port across CPU...
2012-01-07 Gabe BlackAnother merge with the main repository.
2012-01-07 Gabe BlackMerge with the main repository again.
2012-01-07 Gabe BlackMerge with main repository.
2011-12-01 Chris EmmonsOutput: Add hierarchical output support and cleanup...
2011-11-18 Gabe BlackSE/FS: Get rid of FULL_SYSTEM in the CPU directory.
2011-11-01 Gabe BlackSE/FS: Expose the same methods on the CPUs in SE and...
2011-10-31 Gabe BlackGCC: Get everything working with gcc 4.6.1.
2011-10-09 Gabe BlackSE/FS: Build the Interrupt objects in SE mode.
2011-04-15 Nathan Binkerttrace: reimplement the DTRACE function so it doesn...
2011-04-15 Nathan Binkertincludes: sort all includes
2011-02-07 Brad Beckmannm5: added work completed monitoring support
2011-02-07 Joel Hestnessmcpat: Adds McPAT performance counters
2011-01-08 Steve ReinhardtReplace curTick global variable with accessor functions.
2010-12-08 Ali SaidiARM: Support switchover with hardware table walkers
2010-01-19 Derek Howermerge
2009-09-29 Lisa Hsucommit Soumyaroop's bug catch about max_insts_all_threads
2009-05-26 Nathan Binkerttypes: add a type for thread IDs and try to use it...
2009-05-05 Korey Sewellcpus: fix cpu progress event
2009-05-05 Korey Sewellmerge code
2009-05-05 Korey Sewellcpus: fix cpu progress event
2009-04-06 Gabe BlackMerge ARM into the head. ARM will compile but may not...
2009-02-16 Steve ReinhardtFixes to get prefetching working again.
2009-01-26 Gabe BlackCPU: Add a setCPU function to the interrupt objects.
2009-01-24 Nathan Binkertcpu: provide a wakeup mechanism that can be used to...
2008-11-05 Lisa HsuRight now a single thread cpu 1 could get assigned...
2008-11-04 Lisa Hsuget rid of all instances of readTid() and getThreadNum...
2008-11-03 Lisa HsuAdd in Context IDs to the simulator. From now on,...
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