| 2021-02-03 |
Bobby R. Bruce | misc: Merge branch v20.1.0.3 hotfix into develop |
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| 2021-01-27 |
Gabe Black | arch-x86,cpu: Don't use aliases to hide TheISA::. |
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| 2020-11-16 |
Bobby R. Bruce | misc: Merge branch hotfix v20.1.0.2 branch into develop |
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| 2020-11-03 |
Giacomo Travaglini | cpu, fastmodel: Remove the old getDTBPtr/getITBPtr... |
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| 2020-10-21 |
Giacomo Travaglini | cpu: Remove unused demapInstPage and demapDataPage |
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| 2020-10-21 |
Giacomo Travaglini | misc: BaseCPU using ArchMMU instead of ArchDTB/ArchITB |
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| 2020-10-14 |
Gabe Black | misc: Standardize the way create() constructs SimObjects. |
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| 2020-10-01 |
Bobby R. Bruce | misc: Merge branch 'release-staging-v20.1.0.0' into... |
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| 2020-09-30 |
Giacomo Travaglini | cpu: Never use a empty byteEnable |
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| 2020-09-25 |
Bobby R. Bruce | misc: Merge branch 'release-staging-v20.1.0.0' into... |
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| 2020-09-22 |
Bobby R. Bruce | misc: Merge branch 'release-staging-v20.1.0.0' into... |
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| 2020-09-20 |
Gabe Black | arch,cpu,sim: Route system calls through the workload. |
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| 2020-09-10 |
Shivani Parekh | misc: Replaced master/slave terminology |
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| 2020-09-08 |
Timothy Hayes | cpu: Add HTM ExecContext API |
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| 2020-09-02 |
Gabe Black | misc: Remove the "fault" parameter from syscall functions. |
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| 2020-08-26 |
Emily Brickey | cpu: update port terminology |
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| 2020-03-09 |
Gabe Black | arch,cpu: Get rid of unused/unimplemented vtophys variants. |
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| 2020-02-26 |
Bobby R. Bruce | misc: merge branch 'release-staging-v19.0.0.0' into... |
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| 2020-02-24 |
Bobby R. Bruce | misc: Merged release-staging-v19.0.0.0 into develop |
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| 2020-02-17 |
Gabe Black | cpu: Delete authors lists from the cpu directory. |
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| 2020-02-17 |
Giacomo Travaglini | cpu: Mark ExecContext::tcBase() as const |
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| 2019-12-11 |
Giacomo Travaglini | cpu: Fix coding style (byteEnable->byte_enable) |
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| 2019-12-10 |
Gabe Black | arch,cpu,sim: Push syscall number determination up... |
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| 2019-09-23 |
Jordi Vaquero | cpu, mem: Changing AtomicOpFunctor* for unique_ptr... |
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| 2019-08-28 |
Gabe Black | cpu: Make get(Data|Inst)Port return a Port and not... |
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| 2019-05-11 |
Giacomo Gabrielli | cpu,mem: Add support for partial loads/stores and wide... |
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| 2019-05-11 |
Giacomo Gabrielli | cpu: Add a memory access predicate |
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| 2019-04-30 |
Gabe Black | cpu: alpha: Delete all occurrances of the simPalCheck... |
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| 2019-04-30 |
Gabe Black | cpu: Remove hwrei from the generic interfaces. |
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| 2019-04-29 |
Gabe Black | cpu: Get rid of the (read|set)RegOtherThread methods. |
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| 2019-02-08 |
Tuan Ta | cpu: support atomic memory request type with AtomicOpFu... |
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| 2019-02-01 |
Gabe Black | cpu, arch: Replace the CCReg type with RegVal. |
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| 2019-01-31 |
Gabe Black | arch: cpu: Rename *FloatRegBits* to *FloatReg*. |
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| 2019-01-30 |
Giacomo Gabrielli | arch,cpu: Add vector predicate registers |
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| 2019-01-22 |
Gabe Black | arch: cpu: Stop passing around misc registers by reference. |
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| 2019-01-16 |
Gabe Black | cpu: dev: sim: gpu-compute: Banish some ISA specific... |
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| 2018-12-20 |
Gabe Black | arch, cpu: Remove float type accessors. |
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| 2018-11-16 |
Rekai Gonzalez-Alb... | cpu: Fix the usage of const DynInstPtr |
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| 2018-06-11 |
Giacomo Travaglini | misc: Using smart pointers for memory Requests |
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| 2018-06-11 |
Giacomo Travaglini | misc: Substitute pointer to Request with aliased RequestPtr |
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| 2018-01-09 |
Gabe Black | cpu, power: Get rid of the remnants of the EA computati... |
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| 2017-12-22 |
Gabe Black | arch,cpu: "virtualize" the TLB interface. |
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| 2017-07-05 |
Rekai Gonzalez-Alb... | cpu: Added interface for vector reg file |
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| 2017-07-05 |
Rekai Gonzalez-Alb... | cpu: Result refactoring |
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| 2017-07-05 |
Rekai Gonzalez-Alb... | cpu: Simplify the rename interface and use RegId |
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| 2017-07-05 |
Nathanael Premillieu | arch, cpu: Architectural Register structural indexing |
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| 2015-07-20 |
Brandon Potter | syscall_emul: [patch 13/22] add system call retry capab... |
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| 2016-08-15 |
Nikos Nikoleris | cpu, arch: fix the type used for the request flags |
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| 2016-02-23 |
Andreas Hansson | scons: Add missing override to appease clang |
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| 2015-10-12 |
Andreas Hansson | misc: Add explicit overrides and fix other clang >... |
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| 2015-10-12 |
Andreas Hansson | misc: Remove redundant compiler-specific defines |
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| 2015-09-30 |
Mitch Hayenga | cpu,isa,mem: Add per-thread wakeup logic |
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| 2015-09-30 |
Mitch Hayenga | cpu: Add per-thread monitors |
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| 2015-07-28 |
Nilay Vaish | revert 5af8f40d8f2c |
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| 2015-07-26 |
Nilay Vaish | cpu: implements vector registers |
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| 2015-07-07 |
Andreas Sandberg | sim: Refactor the serialization base class |
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| 2015-02-16 |
Andreas Hansson | arch: Make readMiscRegNoEffect const throughout |
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| 2014-11-06 |
Marc Orr | x86 isa: This patch attempts an implementation at mwait. |
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| 2014-09-19 |
Andreas Hansson | arch: Pass faults by const reference where possible |
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| 2014-09-03 |
Andreas Sandberg | arch, cpu: Factor out the ExecContext into a proper... |
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| 2014-01-24 |
Geoffrey Blake | checker: CheckerCPU handling of MiscRegs was incorrect |
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| 2013-10-15 |
Yasuko Eckert | cpu: add a condition-code register class |
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| 2013-10-15 |
Steve Reinhardt | cpu: rename *_DepTag constants to *_Reg_Base |
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| 2013-03-26 |
Andreas Hansson | cpu: Remove CpuPort and use MasterPort in the CPU classes |
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| 2012-08-28 |
Andreas Hansson | Checker: Fix checker CPU ports |
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| 2012-05-26 |
Gabe Black | CPU: Merge the predecoder and decoder. |
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| 2012-03-30 |
William Wang | MEM: Introduce the master/slave port sub-classes in C++ |
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| 2012-03-09 |
Geoffrey Blake | CheckerCPU: Add function stubs to non-ARM ISA source... |
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| 2012-03-09 |
Geoffrey Blake | CheckerCPU: Make CheckerCPU runtime selectable instead... |
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| 2012-02-12 |
Ali Saidi | mem: Add a master ID to each request object. |
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| 2012-02-01 |
Gabe Black | Merge ... head, hopefully the last time for this batch. |
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| 2012-01-31 |
Geoffrey Blake | CheckerCPU: Re-factor CheckerCPU to be compatible with... |
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| 2012-01-31 |
Gabe Black | Merge with main repository. |
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| 2012-01-29 |
Gabe Black | Yet another merge with the main repository. |
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| 2012-01-28 |
Gabe Black | Merge with the main repo. |
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| 2012-01-16 |
Gabe Black | Merge yet again with the main repository. |
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| 2012-01-07 |
Gabe Black | Another merge with the main repository. |
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| 2012-01-07 |
Gabe Black | Merge with the main repository again. |
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| 2012-01-07 |
Gabe Black | Merge with main repository. |
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| 2011-11-18 |
Gabe Black | SE/FS: Get rid of includes of config/full_system.hh. |
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| 2011-11-18 |
Gabe Black | SE/FS: Get rid of FULL_SYSTEM in the CPU directory. |
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| 2011-04-15 |
Nathan Binkert | includes: sort all includes |
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| 2010-11-08 |
Ali Saidi | ARM/Alpha/Cpu: Change prefetchs to be more like normal... |
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| 2010-10-31 |
Gabe Black | ISA,CPU,etc: Create an ISA defined PC type that abstrac... |
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| 2010-08-31 |
Gabe Black | CPU: Get rid of the unused ev5_trap function on the... |
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| 2010-06-03 |
Steve Reinhardt | Minor remote GDB cleanup. |
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| 2009-07-13 |
Derek Hower | merge |
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| 2009-07-09 |
Gabe Black | Registers: Get rid of the float register width parameter. |
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| 2009-04-09 |
Gabe Black | tlb: Don't separate the TLB classes into an instruction... |
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| 2009-04-06 |
Gabe Black | Merge ARM into the head. ARM will compile but may not... |
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| 2009-02-25 |
Gabe Black | CPU: Get rid of translate... functions from various... |
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| 2008-10-20 |
Ali Saidi | O3CPU: Undo Gabe's changes to remove hwrei and simpalch... |
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| 2008-10-11 |
Gabe Black | CPU: Eliminate the simPalCheck funciton. |
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| 2008-10-11 |
Gabe Black | CPU: Eliminate the hwrei function. |
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| 2008-09-10 |
Ali Saidi | style: Remove non-leading tabs everywhere they shouldn... |
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| 2008-08-11 |
Nathan Binkert | params: Convert the CPU objects to use the auto generat... |
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| 2008-02-27 |
Steve Reinhardt | Automated merge with ssh://daystrom.m5sim.org//repo/m5 |
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| 2008-02-27 |
Gabe Black | TLB: Make a TLB base class and put a virtual demapPage... |
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| 2007-03-23 |
Kevin Lim | Merge ktlim@zizzer:/bk/newmem |
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| 2007-03-08 |
Gabe Black | Merge zizzer.eecs.umich.edu:/bk/newmem |
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