cpu: Remove the "SingleThreaded" fetch policy from the O3 CPU.
[gem5.git] / src / cpu / checker /
2020-10-01 Bobby R. Brucemisc: Merge branch 'release-staging-v20.1.0.0' into...
2020-09-30 Giacomo Travaglinicpu: Never use a empty byteEnable
2020-09-25 Bobby R. Brucemisc: Merge branch 'release-staging-v20.1.0.0' into...
2020-09-22 Bobby R. Brucemisc: Merge branch 'release-staging-v20.1.0.0' into...
2020-09-20 Gabe Blackarch,cpu,sim: Route system calls through the workload.
2020-09-10 Shivani Parekhmisc: Replaced master/slave terminology
2020-09-08 Timothy Hayescpu: Add HTM ThreadContext API
2020-09-08 Timothy Hayescpu: Add HTM ExecContext API
2020-09-02 Gabe Blackmisc: Remove the "fault" parameter from syscall functions.
2020-08-28 Gabe Blackmisc: Clean up usage of arch/isa_traits.hh.
2020-08-26 Emily Brickeycpu: update port terminology
2020-08-25 Gabe Blackcpu,arch: Delegate fetching ROM microops to the decoder.
2020-08-05 Gabe Blackcpu: Remove the "profile" parameter and plumbing.
2020-07-04 Bobby R. Brucemisc: Merged m5ops_base hotfix into develop
2020-06-24 Gabe Blackfastmodel,cpu,sim: Eliminate EndQuiesceEvent and plumbing.
2020-06-17 Gabe Blackarch,cpu,sim: Eliminate the now empty kernel statistics...
2020-03-09 Gabe Blackbase,cpu,sim: Stop including arch/vtophys.hh when not...
2020-03-09 Gabe Blackarch,cpu: Get rid of unused/unimplemented vtophys variants.
2020-03-07 Gabe Blackarch,cpu,gpu-compute,mem: Remove asid from Request...
2020-03-04 Gabe Blackarch,cpu,mem: Replace the mmmapped IPR mechanism with...
2020-02-26 Bobby R. Brucemisc: merge branch 'release-staging-v19.0.0.0' into...
2020-02-24 Bobby R. Brucemisc: Merged release-staging-v19.0.0.0 into develop
2020-02-17 Gabe Blackcpu: Delete authors lists from the cpu directory.
2020-02-17 Giacomo Travaglinicpu: Mark ExecContext::tcBase() as const
2020-02-13 Gabe Blackcpu: Remove alpha specialized code.
2020-02-05 Gabe Blackcpu: Make getIsaPtr return a BaseISA pointer.
2019-12-11 Giacomo Travaglinicpu: Fix coding style (byteEnable->byte_enable)
2019-12-11 Giacomo Travaglinicpu: Add byteEnable assertions to readMem and initateMe...
2019-12-10 Gabe Blackarch,cpu,sim: Push syscall number determination up...
2019-11-07 Gabe Blackcpu: Fix a bug in getCurrentInstCount in the checker...
2019-11-02 Gabe Blackarch,cpu: Move endianness conversion of inst bytes...
2019-10-25 Gabe Blackcpu: Get rid of the nextInstEventCount method.
2019-10-25 Gabe Blackcpu: Get rid of the serviceInstCountEvents method.
2019-10-25 Gabe Blackcpu: Switch off of the CPU's comInstEventQueue.
2019-10-25 Gabe Blackcpu,sim: Delegate PCEvent scheduling from Systems to...
2019-10-25 Gabe Blackcpu: Make the ThreadContext a PCEventScope.
2019-10-25 Gabe Blackcpu: Pass the address to check into the PCEventQueue...
2019-09-23 Jordi Vaquerocpu, mem: Changing AtomicOpFunctor* for unique_ptr...
2019-08-28 Gabe Blackcpu: Make get(Data|Inst)Port return a Port and not...
2019-05-30 Gabe Blackarch, base, cpu, gpu, sim: Merge getMemProxy and getVir...
2019-05-30 Gabe Blackcpu, sim: Return PortProxy &s from all the proxy accessors.
2019-05-11 Giacomo Gabriellicpu,mem: Add support for partial loads/stores and wide...
2019-05-11 Giacomo Gabriellicpu: Add a memory access predicate
2019-04-30 Gabe Blackcpu: alpha: Delete all occurrances of the simPalCheck...
2019-04-30 Gabe Blackcpu: Remove hwrei from the generic interfaces.
2019-04-30 Gabe Blackarch: cpu: Track kernel stats using the base ISA agnost...
2019-04-29 Gabe Blackcpu: Get rid of the (read|set)RegOtherThread methods.
2019-04-22 Gabe Blackcpu: Eliminate the ProxyThreadContext class.
2019-02-19 Giacomo Gabriellicpu: Add ISA* getter in Thread interface
2019-02-08 Tuan Tacpu: support atomic memory request type with AtomicOpFu...
2019-02-05 Andrea Mondellimisc: added missing override specifier
2019-02-01 Gabe Blackcpu, arch: Replace the CCReg type with RegVal.
2019-01-31 Gabe Blackarch: cpu: Rename *FloatRegBits* to *FloatReg*.
2019-01-30 Giacomo Gabrielliarch,cpu: Add vector predicate registers
2019-01-22 Gabe Blackarch: cpu: Stop passing around misc registers by reference.
2019-01-16 Gabe Blackcpu: dev: sim: gpu-compute: Banish some ISA specific...
2018-12-20 Gabe Blackarch, cpu: Remove float type accessors.
2018-11-28 Rekai Gonzalez-Alb... cpu,arch-arm: Initialise data members
2018-11-16 Rekai Gonzalez-Alb... cpu: Fix the usage of const DynInstPtr
2018-06-11 Giacomo Travaglinimisc: Using smart pointers for memory Requests
2018-06-11 Giacomo Travaglinimisc: Substitute pointer to Request with aliased RequestPtr
2018-04-27 Giacomo Travaglinisim,cpu,mem,arch: Introduced MasterInfo data structure
2018-01-09 Gabe Blackcpu, power: Get rid of the remnants of the EA computati...
2017-12-22 Gabe Blackarch,cpu: "virtualize" the TLB interface.
2017-12-05 Nikos Nikoleriscpu: Add support for CMOs in the cpu models
2017-07-05 Rekai Gonzalez-Alb... cpu: Added interface for vector reg file
2017-07-05 Rekai Gonzalez-Alb... cpu: Result refactoring
2017-07-05 Rekai Gonzalez-Alb... cpu: Simplify the rename interface and use RegId
2017-07-05 Nathanael Premillieuarch, cpu: Architectural Register structural indexing
2017-02-27 Brandon Pottersyscall_emul: [PATCH 15/22] add clone/execve for thread...
2015-07-20 Brandon Pottersyscall_emul: [patch 13/22] add system call retry capab...
2016-11-09 Brandon Potterstyle: [patch 1/22] use /r/3648/ to reorganize includes
2016-08-15 Nikos Nikoleriscpu, arch: fix the type used for the request flags
2016-04-07 Mitch Hayengamem: Remove threadId from memory request class
2016-04-06 Andreas SandbergRevert power patch sets with unexpected interactions
2016-04-05 Mitch Hayengamem: Remove threadId from memory request class
2016-02-23 Andreas Hanssonscons: Add missing override to appease clang
2015-10-12 Andreas Hanssonmisc: Add explicit overrides and fix other clang >...
2015-10-12 Andreas Hanssonmisc: Remove redundant compiler-specific defines
2015-09-30 Mitch Hayengacpu,isa,mem: Add per-thread wakeup logic
2015-09-30 Mitch Hayengacpu: Add per-thread monitors
2015-08-07 Andreas Sandbergbase: Declare a type for context IDs
2015-07-28 Nilay Vaishrevert 5af8f40d8f2c
2015-07-26 Nilay Vaishcpu: implements vector registers
2015-07-07 Andreas Sandbergsim: Refactor the serialization base class
2015-02-16 Andreas Hanssonarch: Make readMiscRegNoEffect const throughout
2015-02-11 Andreas Sandbergsim: Move the BaseTLB to src/arch/generic/
2015-01-25 Ali Saidicpu: Remove all notion that we know when the cpu is...
2015-01-22 Andreas Hanssonmem: Clean up Request initialisation
2014-11-06 Marc Orrx86 isa: This patch attempts an implementation at mwait.
2014-10-30 Ali Saidiautomated merge
2014-10-30 Ali Saidicpu: Add support to checker for CACHE_BLOCK_ZERO commands.
2014-10-09 Mitch Hayengacpu: Remove Ozone CPU from the source tree
2014-09-27 Andreas Hanssonarch: Use const StaticInstPtr references where possible
2014-09-27 Andreas Hanssonscons: Address issues related to gcc 4.9.1
2014-09-20 Mitch Hayengaalpha,arm,mips,power,x86,cpu,sim: Cleanup activate...
2014-09-19 Andreas Hanssonarch: Pass faults by const reference where possible
2014-09-12 Andrew Bardsleystyle: Fix line continuation, especially in debug messages
2014-05-13 Curtis Dunhammem: Refactor assignment of Packet types
2014-09-03 Andreas Sandbergarch, cpu: Factor out the ExecContext into a proper...
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