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inorder/alpha-isa: create eaComp object visible to StaticInst through ISA
[gem5.git]
/
src
/
cpu
/
simple
/
timing.cc
2009-04-20
Gabe Black
Mem: Change isLlsc to isLLSC.
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2009-04-19
Gabe Black
Memory: Rename LOCKED for load locked store conditional...
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2009-04-19
Gabe Black
CPU: If the simple CPU is already idle, just return...
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2009-04-09
Nathan Binkert
tlb: More fixing of unified TLB
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2009-04-09
Gabe Black
tlb: Don't separate the TLB classes into an instruction...
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2009-04-06
Gabe Black
Merge ARM into the head. ARM will compile but may not...
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2009-03-12
Steve Reinhardt
cpu: fix minor endian issue with trace output
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2009-02-25
Gabe Black
CPU: Don't fetch when executing a macroop.
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2009-02-25
Gabe Black
CPU: Implement translateTiming which defers to translat...
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2009-02-25
Gabe Black
ISA: Replace the translate functions in the TLBs with...
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2009-02-25
Gabe Black
CPU: Get rid of translate... functions from various...
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2008-11-14
Gabe Black
CPU: Refactor read/write in the simple timing CPU.
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2008-11-10
Gabe Black
CPU: Make unaligned accesses work in the timing simple...
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2008-11-10
Gabe Black
X86: Make the timing simple CPU handle variable length...
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2008-11-03
Lisa Hsu
Add in Context IDs to the simulator. From now on,...
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2008-11-03
Lisa Hsu
make BaseCPU the provider of _cpuId, and cpuId() instea...
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2008-10-27
Clint Smullen
CPU: The API change to EventWrapper did not get propag...
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2008-10-13
Gabe Black
X86: Don't fetch in the simple CPU if you're in the...
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2008-10-09
Nathan Binkert
eventq: convert all usage of events to use the new...
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2008-08-11
Nathan Binkert
params: Convert the CPU objects to use the auto generat...
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2008-07-15
Steve Reinhardt
Use ReadResp instead of LoadLockedResp for LoadLockedRe...
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2008-07-01
Ali Saidi
Make the cached virtPort have a thread context so it...
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2008-07-01
Ali Saidi
After a checkpoint (and thus a stats reset), the not_id...
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2008-06-12
Gabe Black
CPU: Make the simple cpu trace data for loads/stores.
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2008-02-14
Ali Saidi
CPU: move the PC Events code to a place where the code...
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2008-02-11
Steve Reinhardt
Automated merge with file:/home/stever/hg/m5-orig
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2008-02-06
Stephen Hines
Make the Event::description() a const function
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2008-02-06
Stephen Hines
Add base ARM code to M5
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2008-01-02
Steve Reinhardt
Additional comments and helper functions for PrintReq.
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2007-12-16
Ali Saidi
CPU: Update where the simple cpus read their cpu id...
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2007-11-08
Ali Saidi
TimingSimpleCPU: Add some DPRINTFs when the cpu suspend...
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2007-10-31
Steve Reinhardt
Merge in bus DPRINTF changes.
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2007-10-22
Gabe Black
Merge with head.
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2007-10-22
Gabe Black
CPU: Add functions to the "ExecContext"s that translate...
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2007-10-19
Gabe Black
Merge with head.
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2007-10-18
Ali Saidi
CPU: Use the ThreadContext cpu id instead of the params...
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2007-10-03
Gabe Black
Merge with head.
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2007-10-01
Ali Saidi
CPU: fix sparc_fs booting with SimpleTimingCPU.
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2007-09-28
Ali Saidi
Update stats for quiesced cycles
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2007-09-28
Ali Saidi
Rename cycles() function to ticks()
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2007-09-28
Ali Saidi
Update statistics to use cycles properly instead of...
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2007-08-28
Gabe Black
Merge with head.
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2007-08-27
Gabe Black
Merge with head
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2007-08-27
Gabe Black
Simple CPU: Don't trace instructions that fault. Otherw...
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2007-08-27
Gabe Black
Simple CPU: Make sure only instructions which complete...
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2007-08-27
Gabe Black
Address Translation: Make SE mode use an actual TLB...
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2007-08-24
Ali Saidi
Mem: Make errors in the memory system be responses...
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2007-08-05
Gabe Black
Merge with head.
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2007-08-03
Steve Reinhardt
merge from head
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2007-08-01
Nathan Binkert
merge: mips fix to getArgument
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2007-08-01
Gabe Black
Merge with head.
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2007-08-01
Gabe Black
Merge with head.
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2007-07-31
Steve Reinhardt
Merge from head.
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2007-07-29
Steve Reinhardt
Merge Gabe's changes from head.
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2007-07-29
Gabe Black
Merge ... head. style.py was also missing an argument...
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2007-07-29
Nathan Binkert
merge: style.py fix
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2007-07-29
Gabe Black
Merge with head.
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2007-07-29
Gabe Black
Turn the instruction tracing code into pluggable sim...
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2007-07-29
Nathan Binkert
merge whitespace fixes
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2007-07-29
Nathan Binkert
merge whitespace changes
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2007-07-27
Nathan Binkert
Merge python and x86 changes with cache branch
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2007-07-24
Gabe Black
Merge with head.
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2007-07-24
Nathan Binkert
Major changes to how SimObjects are created and initial...
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2007-07-22
Steve Reinhardt
Merge from head.
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2007-07-22
Steve Reinhardt
Merge more changes in from head.
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2007-07-16
Steve Reinhardt
Merge from head.
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2007-07-14
Steve Reinhardt
Merge from head.
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2007-07-14
Steve Reinhardt
Merge of DPRINTF fixes from head.
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2007-07-14
Steve Reinhardt
Merge in .hgignore from head.
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2007-07-14
Steve Reinhardt
Merge with head
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2007-07-02
Steve Reinhardt
Couple more minor bug fixes for FS timing mode.
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2007-07-02
Steve Reinhardt
Fix a couple LL/SC bugs that only affected timing mode.
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2007-07-01
Steve Reinhardt
Make CPU models use new LoadLockedReq/StoreCondReq...
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2007-06-30
Steve Reinhardt
Get rid of Packet result field. Error responses are
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2007-06-21
Steve Reinhardt
Merge vm1.(none):/home/stever/bk/newmem-head
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2007-06-20
Gabe Black
Merge zizzer.eecs.umich.edu:/bk/newmem
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2007-06-19
Gabe Black
Merge zizzer.eecs.umich.edu:/bk/newmem
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2007-06-18
Ali Saidi
fix bug in timing cpu. getTime() is the time the requse...
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2007-05-26
Gabe Black
Merge zizzer.eecs.umich.edu:/bk/newmem
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2007-05-21
Steve Reinhardt
Merge vm1.(none):/home/stever/bk/newmem-head
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2007-05-21
Steve Reinhardt
Add new EventWrapper constructor that takes a Tick...
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2007-05-18
Gabe Black
Merge zizzer.eecs.umich.edu:/bk/newmem
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2007-05-10
Gabe Black
Merge zizzer.eecs.umich.edu:/bk/newmem
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2007-05-10
Ali Saidi
Merge zizzer:/bk/newmem
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2007-05-09
Ali Saidi
Merge zeep:/z/saidi/work/m5.newmem
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2007-05-07
Ali Saidi
the bridge never returns false when recvTiming() is...
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2007-03-27
Ron Dreslinski
Merge zizzer:/bk/newmem
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2007-03-23
Kevin Lim
Merge ktlim@zizzer:/bk/newmem
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2007-03-15
Ali Saidi
Merge zizzer:/bk/newmem
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2007-03-15
Gabe Black
Merge zizzer.eecs.umich.edu:/bk/newmem
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2007-03-13
Gabe Black
Merge zizzer.eecs.umich.edu:/bk/newmem
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2007-03-11
Gabe Black
Merge zizzer.eecs.umich.edu:/bk/newmem
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2007-03-11
Gabe Black
Make sttw and sttwa use the twin memory operations.
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2007-03-11
Gabe Black
Merge zizzer.eecs.umich.edu:/bk/newmem
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2007-03-11
Gabe Black
Merge zower:/home/gblack/m5/newmem-statetrace
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2007-03-10
Gabe Black
Merge zizzer.eecs.umich.edu:/bk/newmem
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2007-03-10
Gabe Black
Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmem
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2007-03-10
Ali Saidi
I thought this code got deleted, but since it hasn...
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2007-03-09
Gabe Black
Merge zizzer.eecs.umich.edu:/bk/newmem
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2007-03-09
Ali Saidi
Merge zizzer:/bk/newmem
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